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ZL30661LFG7 - VFLGA / 80

ZL30661LFG7

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Microchip Technology

1-CH SYNCE LINE CARD SYNCHRONIZER

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ZL30661LFG7 - VFLGA / 80

ZL30661LFG7

Active
Microchip Technology

1-CH SYNCE LINE CARD SYNCHRONIZER

Technical Specifications

Parameters and characteristics for this part

SpecificationZL30661LFG7
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]1.045 GHz
InputCMOS
Main PurposeSONET/SDH, Wireless Base Stations, Ethernet
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case80-VFLGA
PLLTrue
Ratio - Input:Output [custom]10
Ratio - Input:Output [custom]5
Supplier Device Package80-LGA (11x11)
Voltage - Supply1.8 V, 3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 176$ 24.02
Microchip DirectTRAY 1$ 29.84
25$ 24.88
100$ 22.62
1000$ 21.85
5000$ 21.58
10000$ 21.34

ZL30661 Series

1-Ch SyncE Line Card Synchronizer

PartPLLSupplier Device PackagePackage / CaseVoltage - SupplyNumber of CircuitsRatio - Input:Output [custom]Ratio - Input:Output [custom]Mounting TypeDifferential - Input:Output [custom]Differential - Input:Output [custom]InputFrequency - Max [Max]Operating Temperature [Max]Operating Temperature [Min]Main Purpose
Microchip Technology
ZL30661LFG7
80-LGA (11x11)
80-VFLGA
1.8 V, 3.3 V
1
10
5
Surface Mount
CMOS
1.045 GHz
85 °C
-40 °C
Ethernet, SONET/SDH, Wireless Base Stations

Description

General part information

ZL30661 Series

The ZL30661 offers one channel of Synchronous Ethernet (SyncE) packet clock synchronization. Using Microsemi’s miTimePLL timing technology, this device offers new and improved features for 5G transport and wireless infrastructure equipment. Each device integrates all features required by line card PLL. High integration along with ultra-low jitter make these devices ideal for use in frequency translation from backplane clock to frequencies required by PHY devices, jitter filtering, and holdover in case both active and redundant timing cards fail.

Under the same family, the ZL3069x offer one to three channels of Synchronous Ethernet (SyncE) packet clock synchronization for timing card interface. Also available is ZL3079x that support one to three independent timing channels of a combined hardware and software platform including IEEE 1588-2008 Precision Time Protocol Stack and Synchronization Algorithms.

Log in to your [MyMicrochip](https://login.microchip.com/ssologin/Account/Login?ReturnUrl=%2Fssologin%2Fconnect%2Fauthorize%2Fcallback%3Fclient_id%3DAuthenticatedUserapi%26redirect_uri%3Dhttps%253A%252F%252Fwww.microchip.com%252Fmymicrochip%252F%2523%252Fcallback%26response_type%3Dcode%26scope%3Dopenid%2520profile%2520AuthenticatedUserapi%26state%3Dd0743a67132a4f7cabf87766498ef7a5%26code_challenge%3D7VwT2FZLyz0rJZj7k5oY1o1voVEo9eQaaVmfjNzodVQ%26code_challenge_method%3DS256%26response_mode%3Dquery) account (with SDE enabled) and request for data sheet and the following application notes.