
74LVC2G02DP-Q100H
ActiveNexperia USA Inc.
NOR GATE, DUAL, 2 INPUT, 8 PINS, TSSOP, 74LVC2G02

74LVC2G02DP-Q100H
ActiveNexperia USA Inc.
NOR GATE, DUAL, 2 INPUT, 8 PINS, TSSOP, 74LVC2G02
Description
General part information
74LVC2G02DP-Q100 Series
The 74LVC2G02-Q100 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC2G02DP-Q100H |
|---|---|
| Current - Output High | 32 mA |
| Current - Output Low | 32 mA |
| Current - Quiescent (Max) | 4 µA |
| Grade | Automotive |
| Input Logic Level - High (Max) | 2 V |
| Input Logic Level - High (Min) | 1.7 V |
| Input Logic Level - Low (Max) | 0.8 V |
| Input Logic Level - Low (Min) | 0.7 V |
| Logic Type | NOR Gate |
| Max CL | 50 pF |
| Max Propagation Delay | 4.3 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 2 |
| Number of Inputs | 2 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 0.118 in |
| Package Name | 8-TSSOP, 8-MSOP, 8-TSSOP |
| Package Width | 3 mm |
| Qualification | AEC-Q100 |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 1.65 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Datasheet
Pin FMEA for LVC family
plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body
TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientation
Nexperia package poster
74LVC2G02DP-Q100 Nexperia Product Reliability
PicoGate Logic footprints
PicoGate leaded logic portfolio guide