
9DB102BGLF
Active2-OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN2

9DB102BGLF
Active2-OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN2
Description
General part information
9DB102 Series
The 9DB102 zero-delay buffer supports PCI Express clocking requirements. The 9DB102 is driven by a differential SRC output pair from an IDT CK409/CK410-compliant main clock generator such as the 952601 or 954101. It attenuates jitter on the input clock and has a selectable PLL Band Width to maximize performance in systems with or without Spread- Spectrum clocking.
Technical Specifications
Parameters and characteristics for this part
| Specification | 9DB102BGLF |
|---|---|
| Differential Input | Yes |
| Differential Output | Yes |
| Frequency - Max | 101 MHz |
| Input | Clock |
| Input Ratio | 1 |
| Main Purpose | PCI Express (PCIe) |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Output | HCSL |
| Output Ratio | 2 |
| Package Length | 0.173 in |
| Package Name | 20-TSSOP |
| Package Width | 4.4 mm |
| PLL | Yes |
| Voltage - Supply (Maximum) | 3.465 V |
| Voltage - Supply (Minimum) | 3.135 V |
Pricing
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CAD
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