The 810N322I-02 device uses Renesas' fourth generation FemtoClock® NG technology for optimal high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The 810N322I-02 is a PLL based synchronous multiplier that is optimized for Ethernet to SONET/PDH clock jitter attenuation and frequency translation. The 810N322I-02 is a fully integrated Phase Locked loop utilizing a FemtoClock NG Digital VCXO that provides the low jitter, high frequency SONET/PDH output clock that easily meets OC-48 jitter requirements. This VCXO technology simplifies PLL design by replacing the pullable crystal requirement of analog VCXOs with a fixed 27MHz generator crystal. Jitter attenuation down to 9Hz is provided by an external loop filter. Pre-divider and output divider multiplication ratios are selected using device selection control pins. The multiplication ratios are optimized to support most common clock rates used in PDH, SONET and Ethernet applications. The device requires the use of an external, inexpensive fundamental mode 27MHz crystal. The device is packaged in a space-saving 32-VFQFN package and supports commercial temperature range.