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SN74LVC10ANSR - 14-SO

SN74LVC10ANSR

Active
Texas Instruments

THREE-CHANNEL, THREE-INPUT, 1.65V TO 3.6V NAND GATES

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Search across all available documentation for this part.

DocumentsUse of the CMOS Unbuffered Inverter in Oscillator CircuitsUnderstanding Advanced Bus-Interface Products Design Guide+25
SN74LVC10ANSR - 14-SO

SN74LVC10ANSR

Active
Texas Instruments

THREE-CHANNEL, THREE-INPUT, 1.65V TO 3.6V NAND GATES

Deep-Dive with AI

DocumentsUse of the CMOS Unbuffered Inverter in Oscillator CircuitsUnderstanding Advanced Bus-Interface Products Design Guide+25
SpecificationsPricingSeriesDescriptionDocuments

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationSN74LVC10ANSRSN74LVC10A Series
Current - Output High, Low [custom]24 mA24 mA
Current - Output High, Low [custom]24 mA24 mA
Current - Quiescent (Max) [Max]1 çA1 çA
Input Logic Level - High [Max]2 V2 V
Input Logic Level - High [Min]1.7 V1.7 V
Input Logic Level - Low [Max]0.8 V0.8 V
Input Logic Level - Low [Min]0.7 V0.7 V
Logic TypeNAND GateNAND Gate
Max Propagation Delay @ V, Max CL4.7 ns4.7 ns
Mounting TypeSurface MountSurface Mount
Number of Circuits33
Number of Inputs33
Operating Temperature [Max]125 °C85 - 125 °C
Operating Temperature [Min]-40 °C-40 °C
Package / Case14-SOIC14-VFQFN Exposed Pad, 14-WFQFN Exposed Pad, 14-SOIC, 14-TSSOP, 14-SSOP
Package / Case-0.173 in
Package / Case-4.4 mm
Package / Case-3.9 mm
Package / Case-0.154 - 5.3 in
Package / Case-0.209 in
Package / Case [y]5.3 mm5.3 mm
Package / Case [y]0.209 in0.209 in
Supplier Device Package14-SO14-VQFN (3.5x3.5), 14-WQFN (3x2.5), 14-SO, 14-TSSOP, 14-SSOP
Voltage - Supply [Max]3.6 V3.6 V
Voltage - Supply [Min]1.65 V1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

SN74LVC10A Series

Three-channel, three-input, 1.65V to 3.6V NAND gates

PartVoltage - Supply [Max]Voltage - Supply [Min]Number of InputsInput Logic Level - High [Min]Input Logic Level - High [Max]Number of CircuitsCurrent - Quiescent (Max) [Max]Operating Temperature [Min]Operating Temperature [Max]Mounting TypeMax Propagation Delay @ V, Max CLSupplier Device PackageLogic TypeCurrent - Output High, Low [custom]Current - Output High, Low [custom]Package / CaseInput Logic Level - Low [Max]Input Logic Level - Low [Min]Package / Case [y]Package / Case [y]Package / Case [custom]Package / Case [custom]Package / CasePackage / CasePackage / Case
Texas Instruments
SN74LVC10ARGYR
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
85 °C
Surface Mount
4.7 ns
14-VQFN (3.5x3.5)
NAND Gate
24 mA
24 mA
14-VFQFN Exposed Pad
0.8 V
0.7 V
Texas Instruments
SN74LVC10ABQAR
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
14-WQFN (3x2.5)
NAND Gate
24 mA
24 mA
14-WFQFN Exposed Pad
0.8 V
0.7 V
Texas Instruments
SN74LVC10ANSR
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
14-SO
NAND Gate
24 mA
24 mA
14-SOIC
0.8 V
0.7 V
5.3 mm
0.209 in
Texas Instruments
SN74LVC10APWR
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
14-TSSOP
NAND Gate
24 mA
24 mA
14-TSSOP
0.8 V
0.7 V
0.173 in
4.4 mm
Texas Instruments
SN74LVC10AD
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
NAND Gate
24 mA
24 mA
14-SOIC
0.8 V
0.7 V
3.9 mm
0.154 in
Texas Instruments
SN74LVC10ADBR
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
14-SSOP
NAND Gate
24 mA
24 mA
14-SSOP
0.8 V
0.7 V
5.3 mm
0.209 in
Texas Instruments
SN74LVC10APW
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
14-TSSOP
NAND Gate
24 mA
24 mA
14-TSSOP
0.8 V
0.7 V
0.173 in
4.4 mm
Texas Instruments
SN74LVC10ADT
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
NAND Gate
24 mA
24 mA
14-SOIC
0.8 V
0.7 V
3.9 mm
0.154 in
Texas Instruments
SN74LVC10ADR
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
NAND Gate
24 mA
24 mA
14-SOIC
0.8 V
0.7 V
3.9 mm
0.154 in
Texas Instruments
SN74LVC10APWT
This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation. This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
3.6 V
1.65 V
3
1.7 V
2 V
3
1 çA
-40 °C
125 °C
Surface Mount
4.7 ns
14-TSSOP
NAND Gate
24 mA
24 mA
14-TSSOP
0.8 V
0.7 V
0.173 in
4.4 mm

Description

General part information

SN74LVC10A Series

This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.

This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.

Documents

Technical documentation and resources

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Little Logic Guide 2018 (Rev. G)

Selection guide

Logic Guide (Rev. AB)

Selection guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

SN74LVC10A Triple 3-Input Positive-NAND Gate datasheet (Rev. Q)

Data sheet

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

How to Select Little Logic (Rev. A)

Application note

Signal Switch Data Book (Rev. A)

User guide

Texas Instruments Little Logic Application Report

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Selecting the Right Level Translation Solution (Rev. A)

Application note

Live Insertion

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

TI IBIS File Creation, Validation, and Distribution Processes

Application note

LVC Characterization Information

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note