Technical Specifications
Parameters and characteristics for this part
| Specification | M24C32-FMH6TG |
|---|---|
| Access Time | 450 ns |
| Memory Format | EEPROM |
| Memory Interface | I2C |
| Memory Organization [custom] | 4 K |
| Memory Organization [custom] | 8 bits |
| Memory Size | 32 Kbit |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 5-UFDFN |
| Supplier Device Package | 5-UFDFPN (1.7x1.4) |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.7 V |
| Write Cycle Time - Word, Page | 5 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 5000 | $ 0.21 | |
| 10000 | $ 0.21 | |||
| Digikey | Cut Tape (CT) | 1 | $ 0.40 | |
| 10 | $ 0.39 | |||
| 25 | $ 0.36 | |||
| 50 | $ 0.36 | |||
| 100 | $ 0.32 | |||
| 250 | $ 0.32 | |||
| 500 | $ 0.31 | |||
| 1000 | $ 0.30 | |||
| Digi-Reel® | 1 | $ 0.40 | ||
| 10 | $ 0.39 | |||
| 25 | $ 0.36 | |||
| 50 | $ 0.36 | |||
| 100 | $ 0.32 | |||
| 250 | $ 0.32 | |||
| 500 | $ 0.31 | |||
| 1000 | $ 0.30 | |||
| Tape & Reel (TR) | 5000 | $ 0.27 | ||
| 10000 | $ 0.27 | |||
| 15000 | $ 0.27 | |||
| 25000 | $ 0.26 | |||
| Newark | Each (Supplied on Cut Tape) | 1 | $ 0.36 | |
| 10 | $ 0.34 | |||
| 25 | $ 0.33 | |||
| 50 | $ 0.32 | |||
| 100 | $ 0.32 | |||
| 250 | $ 0.31 | |||
| 500 | $ 0.30 | |||
| 1000 | $ 0.25 | |||
Description
General part information
M24C32-DRE Series
The M24C32-DRE is a 32-Kbit serial EEPROM device operating up to 105 °C. The M24C32-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C32-DRE is a byte-alterable memory (4 K × 8 bits) organized as 128 pages of 32 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
Documents
Technical documentation and resources