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32-LFCSP-WQ

ADN2804ACPZ

Unknown
Analog Devices Inc./Maxim Integrated

622 MBPS CLOCK AND DATA RECOVERY IC WITH INTEGRATED LIMITING AMPLIFIER

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32-LFCSP-WQ

ADN2804ACPZ

Unknown
Analog Devices Inc./Maxim Integrated

622 MBPS CLOCK AND DATA RECOVERY IC WITH INTEGRATED LIMITING AMPLIFIER

Find alt

Description

General part information

ADN2804 Series

The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. In the absence of input data, the output clock drifts no more than ±5%. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver.The receiver’s front-end loss-of-signal (LOS) detector circuit indicates when the input signal level falls below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output.The ADN2804 is available in a compact 5 mm × 5 mm, 32-lead LFCSP.ApplicationsBPON ONTSONET OC-12WDM transpondersRegenerators/repeatersTest equipmentBroadband cross-connects and routers

Technical Specifications

Parameters and characteristics for this part

SpecificationADN2804ACPZ
Differential InputYes
Differential OutputYes
Frequency - Max622 MHz
InputCML
Input Ratio1
Main PurposeSONET/SDH
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
OutputLVDS
Output Ratio2
Package / Case32-WFQFN Exposed Pad, CSP
Package Length5 mm
Package Name32-LFCSP-WQ
Package Width5 mm
PLLYes
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)3 V

Pricing

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CAD

3D models and CAD resources for this part