ADSP-BF592KCPZ-2
ActiveAnalog Devices Inc./Maxim Integrated
LOW COST BLACKFIN WITH OPTIMIZED PERIPHERAL SET FOR INDUSTRIAL AND GENERAL PURPOSE APPLICATIONS
ADSP-BF592KCPZ-2
ActiveAnalog Devices Inc./Maxim Integrated
LOW COST BLACKFIN WITH OPTIMIZED PERIPHERAL SET FOR INDUSTRIAL AND GENERAL PURPOSE APPLICATIONS
Description
General part information
ADSP-BF592 Series
The ADSP-BF592 processor is a member of the Blackfin®family of products, incorporating the Analog Devices/Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture.
Technical Specifications
Parameters and characteristics for this part
| Specification | ADSP-BF592KCPZ-2 |
|---|---|
| Clock Rate (Frequency) | 200 MHz |
| Interface | SPORT, IrDA, I2S, SPI, PPI, I2C, UART |
| Mounting Type | Surface Mount |
| Non-Volatile Memory Size | 64 kB |
| Non-Volatile Memory Type | ROM |
| On-Chip RAM | 64 kB |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Package / Case | CSP, 64-VFQFN Exposed Pad |
| Package Length | 9 mm |
| Package Name | 64-LFCSP-VQ |
| Package Width | 9 mm |
| Type | Fixed Point |
| Voltage - Core | 1.29 V |
| Voltage - I/O (Option 1) | 1.8 V |
| Voltage - I/O (Option 2) | 2.5 V |
| Voltage - I/O (Option 3) | 3.3 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Datasheet
ADSP-BF592KCPZ-2 | Datasheet
EE-302: Interfacing ADSP-BF53x Blackfin® Processors to NAND FLASH Memory (Rev.1)
ADSP-BF59x Blackfin®Processor Hardware Reference (Rev.1.2)
EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev.5)
ADSP-BF592 EZ-KIT Lite®Evaluation System Manual (Rev.1.1)
EE-303: Using VisualDSP++® Thread-Safe Libraries with a Third-Party RTOS (Rev.1)
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)
EE-197: ADSP-BF531/532/533 Blackfin® Processor Multi-cycle Instructions and Latencies
EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)
EE-350: Seamlessly Interfacing MEMS Microphones with Blackfin Processors (Rev.1)
ADSP-BF592 Blackfin Embedded Processor Data Sheet (Rev.D)
Blackfin®/SHARC®USB EZ-Extender®Manual (Rev.1.1)
ICE-100B Emulator User’s Guide (Rev.1.1)
EE-271: Using Cache Memory on Blackfin® Processors (Rev.2)
EE-326: Blackfin® Processor and SDRAM Technology (Rev.2)
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++
EE-192: Using C To Create Interrupt-Driven Systems On Blackfin® Processors
EE-301: Video Templates for Developing Multimedia Applications on Blackfin® Processors (Rev.1)
EE-304: Using the Blackfin® Processor SPORT to Emulate a SPI Interface (Rev.1)
VisualDSP++®5.0 Loader and Utilities Manual (Rev.2.5)
VisualDSP++®5.0 Device Drivers and System Services Manual for Blackfin Processors (Rev.4.3)
EE-347: Formatted Print to a UART Terminal with Blackfin® Processors (Rev.3)
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)
VisualDSP++®5.0 C/C++ Compiler and Library Manual for Blackfin Processors (Rev.5.4)
VisualDSP++®5.0 Users Guide (Rev.3.0)
Package Drawing - 64-Lead LFCSP (9mm x 9mm w/ EP)
HPUSB, USB, and HPPCI Emulator User’s Guide (Rev.3.2)
EE-149: Tuning C Source Code for the Blackfin® Processor Compiler
EE-204: Blackfin® Processor SCCB Software Interface for Configuring I2C® Slave Devices (Rev.2)
EE-351: Using the ADSP-BF592 Blackfin® Processor Tools Utility ROM (Rev.2)
EE-334: Using Blackfin®Processor Hibernate State for Low Standby Power (Rev.1)
EE-311: VisualDSP++® Flash Programmer API for Blackfin® Processors (Rev.1)
VisualDSP++®5.0 Kernel (VDK) Users Guide (Rev.3.5)
EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev.4)
EE-213: Host Communication via the Asynchronous Memory Interface for Blackfin® Processors (Rev.2)
EE-341: Expert Pin Multiplexing Plug-in for Blackfin® Processors (Rev.3)
EE-276: Video Framework Considerations for Image Processing on Blackfin® Processors (Rev.1)
EE-312: Building Complex VDK/LwIP Applications Using Blackfin® Processors (Rev.2)
VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)
ADSP-BF5xx/ADSP-BF60x Blackfin® Processor Programming Reference (Rev.2.2)
EE-333: Interfacing Blackfin® Processors to Winbond W25X16 SPI Flash Devices (Rev.1)
EE-308: Estimating and Optimizing Booting Time for Blackfin® Processors (Rev.1)
VisualDSP++®5.0 Linker and Utilities Manual (Rev.3.5)
ICE-1000/ICE-2000 Emulator User’s Guide (Rev.1.2)
EE-335: Interfacing SD Cards with Blackfin Processors (Rev.1)
VisualDSP++®5.0 Licensing Guide (Rev.1.4)
EE-236: Real-Time Solutions Using Mixed-Signal Front-End Devices with the Blackfin®Processor (Rev.1)
EE-309: Power Mode Transition Times of Blackfin® Processors (Rev.1)
VisualDSP++®5.0 Product Release Bulletin (Rev.3.0)
EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev.1)
EE-235: An Introduction to Scripting in VisualDSP++® (Rev.1)
EE-104: Setting Up Streams with the VisualDSP Debugger
EE-234: Interfacing T1/E1 Transceivers/Framers to Blackfin® Processors via the Serial Port (Rev.1)
VisualDSP++®5.0 Getting Started Guide (Rev.3.0)
VisualDSP++®5.0 Assembler and Preprocessor Manual (Rev.3.4)
EE-325: Interfacing Atmel Fingerprint Sensor AT77C104B with Blackfin® Processors (Rev.1)
EE-257: A Boot Compression/Decompression Algorithm for Blackfin® Processors (Rev.1)
EE-339: Using External Switching Regulators with Blackfin® Processors (Rev.1)
EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev.2)
EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)
EE-306: PGO Linker - A Code Layout Tool for Blackfin Processors (Rev.1)
