TRS3222ECDW
ActiveTexas Instruments
3- TO 5.5-V DUAL CHANNEL 500KBPS RS-232 LINE DRIVER/RECEIVER WITH +/-15-KV IEC-ESD PROTECTION
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TRS3222ECDW
ActiveTexas Instruments
3- TO 5.5-V DUAL CHANNEL 500KBPS RS-232 LINE DRIVER/RECEIVER WITH +/-15-KV IEC-ESD PROTECTION
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Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | TRS3222ECDW | TRS3222 Series |
|---|---|---|
| Data Rate | 500 kbps | 250 - 500 kbps |
| Duplex | Full | Full |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Drivers/Receivers [custom] | 2 | 2 |
| Number of Drivers/Receivers [custom] | 2 | 2 |
| Operating Temperature [Max] | 70 ░C | 70 - 85 °C |
| Operating Temperature [Min] | 0 °C | -40 - 0 °C |
| Package / Case | 7.5 mm, 0.295 in | 0.173 - 7.5 in |
| Package / Case | 20-SOIC | 20-TSSOP, 20-SSOP, 20-SOIC |
| Package / Case | - | 4.4 mm |
| Protocol | RS232 | RS232 |
| Receiver Hysteresis | 300 mV | 300 mV |
| Supplier Device Package | 20-SOIC | 20-TSSOP, 20-SSOP, 20-SOIC |
| Type | Transceiver | Transceiver |
| Voltage - Supply [Max] | 5.5 V | 5.5 V |
| Voltage - Supply [Min] | 3 V | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
TRS3222 Series
IC TRANSCEIVER FULL 2/2 20TSSOP
| Part | Mounting Type | Supplier Device Package | Type | Operating Temperature [Min] | Operating Temperature [Max] | Number of Drivers/Receivers [custom] | Number of Drivers/Receivers [custom] | Duplex | Package / Case | Package / Case | Package / Case | Receiver Hysteresis | Data Rate | Protocol | Voltage - Supply [Min] | Voltage - Supply [Max] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Surface Mount | 20-TSSOP | Transceiver | -40 °C | 85 °C | 2 | 2 | Full | 0.173 in | 4.4 mm | 20-TSSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V | |
Surface Mount | 20-TSSOP | Transceiver | 0 °C | 70 ░C | 2 | 2 | Full | 0.173 in | 4.4 mm | 20-TSSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V | |
Surface Mount | 20-TSSOP | Transceiver | 0 °C | 70 ░C | 2 | 2 | Full | 0.173 in | 4.4 mm | 20-TSSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V | |
Texas Instruments TRS3222ECPWThe TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high.
The TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high. | Surface Mount | 20-TSSOP | Transceiver | 0 °C | 70 ░C | 2 | 2 | Full | 0.173 in | 4.4 mm | 20-TSSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V |
Texas Instruments TRS3222EIDBRThe TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high.
The TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high. | Surface Mount | 20-SSOP | Transceiver | -40 °C | 85 °C | 2 | 2 | Full | 0.209 in, 5.3 mm | 20-SSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V | |
Texas Instruments TRS3222EIPWRThe TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high.
The TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high. | Surface Mount | 20-TSSOP | Transceiver | -40 °C | 85 °C | 2 | 2 | Full | 0.173 in | 4.4 mm | 20-TSSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V |
Texas Instruments TRS3222ECDWThe TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high.
The TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high. | Surface Mount | 20-SOIC | Transceiver | 0 °C | 70 ░C | 2 | 2 | Full | 0.295 in, 7.5 mm | 20-SOIC | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V | |
Texas Instruments TRS3222CDBRThe TRS3222 consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbit/s and a maximum of 30-V/µ s driver output slew rate.
The TRS3222 can be placed in the power-down mode by settingPWRDOWNlow, which draws only 1 µ A from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V- is raised toward GND. Receiver outputs also can be placed in the high-impedance state by settingENhigh.
The TRS3222 consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbit/s and a maximum of 30-V/µ s driver output slew rate.
The TRS3222 can be placed in the power-down mode by settingPWRDOWNlow, which draws only 1 µ A from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V- is raised toward GND. Receiver outputs also can be placed in the high-impedance state by settingENhigh. | Surface Mount | 20-SSOP | Transceiver | 0 °C | 70 ░C | 2 | 2 | Full | 0.209 in, 5.3 mm | 20-SSOP | 300 mV | 250 KBd | RS232 | 3 V | 5.5 V | |
Surface Mount | 20-TSSOP | Transceiver | 0 °C | 70 ░C | 2 | 2 | Full | 0.173 in | 4.4 mm | 20-TSSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V | |
Surface Mount | 20-SSOP | Transceiver | -40 °C | 85 °C | 2 | 2 | Full | 0.209 in, 5.3 mm | 20-SSOP | 300 mV | 500 kbps | RS232 | 3 V | 5.5 V |
Description
General part information
TRS3222 Series
The TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable (EN) high.
Documents
Technical documentation and resources