16-Bit Digital Signal Controllers (up to 32-Kbyte Flash and 2-Kbyte SRAM)Operating Conditions • 3.0V to 3.6V, -40°C to +125°C, DC to 16 MIPS • 3.0V to 3.6V, -40°C to +150°C, DC to 5 MIPS Core: 16-Bit dsPIC33F CPU • Code-Efficient (C and Assembly) Architecture • Two 40-Bit Wide Accumulators • Single-Cycle (MAC/MPY) with Dual Data Fetch • Single-Cycle Mixed-Sign MUL plus Hardware Divide • 32-Bit Multiply Support Clock Management • ±0.25% Internal Oscillator • Programmable PLLs and Oscillator Clock Sources • Fail-Safe Clock Monitor (FSCM) • Independent Watchdog Timer (WDT) • Fast Wake-up and Start-up Power Management • Low-Power Management modes (Sleep, Idle, Doze) • Integrated Power-on Reset and Brown-out Reset • 1 mA/MHz Dynamic Current (typical) • 30 µA IPD Current (typical) PWM • Up to Three PWM Pairs • Two Dead-Time Generators • 31.25 ns PWM Resolution • PWM Support for: - Inverters, PFC, UPS - BLDC, PMSM, ACIM, SRM • Class B-Compliant Fault Inputs • Possibility of ADC Synchronization with PWM Signal Advan