Zenode.ai Logo
ADC3644IRSBR - 40-pin (RSB) package image

ADC3644IRSBR

Active
Texas Instruments

DUAL-CHANNEL, 14-BIT, 125-MSPS, LOW-NOISE, ULTRA-LOW-POWER ANALOG-TO-DIGITAL CONVERTER (ADC)

ADC3644IRSBR - 40-pin (RSB) package image

ADC3644IRSBR

Active
Texas Instruments

DUAL-CHANNEL, 14-BIT, 125-MSPS, LOW-NOISE, ULTRA-LOW-POWER ANALOG-TO-DIGITAL CONVERTER (ADC)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 3000$ 63.75
Texas InstrumentsLARGE T&R 1$ 67.83
100$ 65.79
250$ 54.77
1000$ 51.00

Description

General part information

ADC3644 Series

The ADC3644 device is a low-noise, ultra-low power, 14-bit, 125-MSPS dual-channel, high-speed analog-to-digital converter (ADC). Designed for low power consumption, the device delivers a noise spectral density of –153 dBFS/Hz, combined with very good linearity and dynamic range. The ADC3644 offers IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 82 mW/ch at 125 MSPS, and power consumption scales well with lower sampling rates.

The ADC3644 use a DDR or a serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to 105⁰C.

The ADC3644 device is a low-noise, ultra-low power, 14-bit, 125-MSPS dual-channel, high-speed analog-to-digital converter (ADC). Designed for low power consumption, the device delivers a noise spectral density of –153 dBFS/Hz, combined with very good linearity and dynamic range. The ADC3644 offers IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 82 mW/ch at 125 MSPS, and power consumption scales well with lower sampling rates.