CD74HC4520MT

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Texas Instruments

HIGH SPEED CMOS LOGIC DUAL BINARY UP-COUNTERS

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DocumentsSN54/74HCT CMOS Logic Family Applications and Restrictions LOGIC Pocket Data Book (Rev. B)+12

CD74HC4520MT

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Texas Instruments

HIGH SPEED CMOS LOGIC DUAL BINARY UP-COUNTERS

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DocumentsSN54/74HCT CMOS Logic Family Applications and Restrictions LOGIC Pocket Data Book (Rev. B)+12

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics commom to parts in this series

Specification	CD74HC4520MT	74HC4520 Series

Count Rate	35 MHz	35 MHz
Direction	Up	Up
Logic Type	Binary Counter	Binary Counter
Mounting Type	Surface Mount	Surface Mount, Through Hole
Number of Bits per Element	4	4
Number of Elements [custom]	2	2
Operating Temperature [Max]	125 °C	125 °C
Operating Temperature [Min]	-55 °C	-55 °C
Package / Case	16-SOIC	16-SOIC, 16-DIP
Package / Case	3.9 mm Width, 0.154 in	0.154 - 7.62 mm Width
Reset	Asynchronous	Asynchronous
Supplier Device Package	16-SOIC	16-SOIC, 16-PDIP
Timing	Synchronous	Synchronous
Trigger Type	Negative, Positive	Negative, Positive
Voltage - Supply [Max]	6 V	6 V
Voltage - Supply [Min]	2 V	2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 2.04
		10	$ 1.30
		25	$ 1.11
		100	$ 0.89
	Digi-Reel®	1	$ 1.37
		10	$ 1.22
		25	$ 1.16
		100	$ 0.95
	Tape & Reel (TR)	250	$ 0.89
		500	$ 0.79
		1250	$ 0.62
		2500	$ 0.58
		6250	$ 0.55
		12500	$ 0.53
Texas Instruments	SMALL T&R	1	$ 1.18
		100	$ 0.80
		250	$ 0.62
		1000	$ 0.41

74HC4520 Series

High Speed CMOS Logic Dual Binary Up-Counters

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Count Rate	Trigger Type	Number of Elements [custom]	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Timing	Number of Bits per Element	Package / Case	Package / Case	Supplier Device Package	Direction	Logic Type	Reset
Texas Instruments CD74HC4520MT The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.	6 V	2 V	35 MHz	Negative, Positive	2	Surface Mount	-55 °C	125 °C	Synchronous	4	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	Up	Binary Counter	Asynchronous
Texas Instruments CD74HC4520E The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.	6 V	2 V	35 MHz	Negative, Positive	2	Through Hole	-55 °C	125 °C	Synchronous	4	16-DIP	0.3 in, 7.62 mm	16-PDIP	Up	Binary Counter	Asynchronous
Texas Instruments CD74HC4520M96 The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.	6 V	2 V	35 MHz	Negative, Positive	2	Surface Mount	-55 °C	125 °C	Synchronous	4	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	Up	Binary Counter	Asynchronous
Texas Instruments CD74HC4520M The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.	6 V	2 V	35 MHz	Negative, Positive	2	Surface Mount	-55 °C	125 °C	Synchronous	4	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	Up	Binary Counter	Asynchronous
Texas Instruments CD74HC4520M96G4 Counter IC Binary Counter 2 Element 4 Bit Positive, Negative 16-SOIC	6 V	2 V	35 MHz	Negative, Positive	2	Surface Mount	-55 °C	125 °C	Synchronous	4	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	Up	Binary Counter	Asynchronous

Description

General part information

74HC4520 Series

The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.

Documents

Technical documentation and resources

CD74HC4520MT

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CD74HC4520MT

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Technical Specifications

Pricing

74HC4520 Series

Description

74HC4520 Series

Documents

SN54/74HCT CMOS Logic Family Applications and Restrictions

LOGIC Pocket Data Book (Rev. B)

Signal Switch Data Book (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

CMOS Power Consumption and CPD Calculation (Rev. B)

CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520 datasheet (Rev. D)

TI IBIS File Creation, Validation, and Distribution Processes

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Logic Guide (Rev. AB)

Live Insertion

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

Designing With Logic (Rev. C)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)