| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
Microchip TechnologySY100EP14 | Buffers, Transceivers & Line Drivers | 4 | 1 | |
Microchip TechnologySY100EP140 | Clock/Timing | 5 | 8 | |
Microchip TechnologySY100EP14U | Integrated Circuits (ICs) | 5 | 1 | The SY100EP14U is a high-speed, 2GHz differential PECL/ECL 1:5 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than 25ps over temperature and supply voltage. The wide supply voltage operation allows this fanout buffer to operate in 2.5V, 3.3V, and 5V systems. A VBB... Read More |
Microchip TechnologySY100EP15 | Clock/Timing | 3 | 1 | The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TSSOP package. The 2:1 mux input accepts a single-ended PECL/ECL source (CLK1) and a differential PECL/ECL/HSTL source (CLK0). All I/O pins are 100K EP PECL/ECL logic compatible. AC performance... Read More |
Microchip TechnologySY100EP15V | Clock & Timing | 10 | 1 | The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TSSOP package. The 2:1 mux input accepts a single-ended PECL/ECL source (CLK1) and a differential PECL/ECL/HSTL source (CLK0). All I/O pins are 100K EP PECL/ECL logic compatible. AC performance... Read More |
Microchip TechnologySY100EP195 | Clock And Timing | 8 | 1 | The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TSSOP package. The 2:1 mux input accepts a single-ended PECL/ECL source (CLK1) and a differential PECL/ECL/HSTL source (CLK0). All I/O pins are 100K EP PECL/ECL logic compatible. AC performance... Read More |
Microchip TechnologySY100EP196 | Delay Lines | 4 | 1 | The SY100EP196V is a programmable delay line, varying the time a logic signal takes to traverse from IN to Q. This delay can vary from about 2.2ns to about 12.2ns. The input can be PECL, LVPECL, NECL, or LVNECL.The delay varies in discrete steps based on a control word presented... Read More |
Microchip TechnologySY100EP210 | Clock/Timing | 3 | 1 | |
Microchip TechnologySY100EP56 | Semiconductors - ICs | 6 | 1 | The SY100EP56V is a high-speed, low-skew, fully differential Dual PECL/ECL 2:1 multiplexer. This device is a pin-for-pin, plug-in replacement to the MC10/100EP56DT. Two separate 2:1 multiplexers (Channel 0 and Channel 1) with dedicated select control pins (SEL0 and SEL1) are implemented in a 20-pin TSSOP package. The signal-path inputs (D0a,... Read More |
Microchip TechnologySY100EP57 | Signal Switches, Multiplexers, Decoders | 4 | 1 | The SY100EP57V is a high-speed, low-skew, fully differential PECL/ECL 4:1 multiplexer in a 20-pin TSSOP package. This device is a pin-for-pin, plug-in replacement to the MC10/100EP57DT. The signal-path inputs (D0:D3) accept differential signals as low as 150mVpk-pk. All I/O pins are 100K EP PECL/ECL logic compatible. AC–performance is guaranteed over... Read More |