Catalog(5 parts)
Part | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Number of Bits per Element▲▼ | Supplier Device Package | Operating Temperature▲▼ | Operating Temperature▲▼ | Number of Elements▲▼ | Mounting Type | Output Type | Package / Case▲▼ |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74ALS623ANTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-PDIP | 5.5 V | 4.5 V | 0.024000000208616257 A | 0.014999999664723871 A | 20-DIP | 0.007619999814778566 m | 0.007619999814778566 m | 8 ul | 20-PDIP | 70 °C | 0 °C | 1 ul | Through Hole | 3-State | |
Texas Instruments SN74ALS623ADWTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 5.5 V | 4.5 V | 0.024000000208616257 A | 0.014999999664723871 A | 20-SOIC | 8 ul | 20-SOIC | 70 °C | 0 °C | 1 ul | Surface Mount | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | ||
Texas Instruments SN74ALS623ADWRG4Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 5.5 V | 4.5 V | 0.024000000208616257 A | 0.014999999664723871 A | 20-SOIC | 8 ul | 20-SOIC | 70 °C | 0 °C | 1 ul | Surface Mount | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | ||
Texas Instruments SN74ALS623ADWRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 5.5 V | 4.5 V | 0.024000000208616257 A | 0.014999999664723871 A | 20-SOIC | 8 ul | 20-SOIC | 70 °C | 0 °C | 1 ul | Surface Mount | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | ||
Texas Instruments SN74ALS623AN3Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-PDIP | 5.5 V | 4.5 V | 0.024000000208616257 A | 0.014999999664723871 A | 20-DIP | 0.007619999814778566 m | 0.007619999814778566 m | 8 ul | 20-PDIP | 70 °C | 0 °C | 1 ul | Through Hole | 3-State |
Key Features
• Local Bus-Latch CapabilityChoice of True or Inverting LogicPackage Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPsLocal Bus-Latch CapabilityChoice of True or Inverting LogicPackage Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs
Description
AI
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.