MC100EPT25 Series

Translator, Differential LVECL / ECL to LVTTL

Catalog

Translator, Differential LVECL / ECL to LVTTL

Part	Channel Type	Channels per Circuit	Supplier Device Package	Package / Case	Package / Case [custom]	Package / Case	Translator Type	Mounting Type	Input Signal	Output Type	Operating Temperature [Max]	Operating Temperature [Min]	Output Signal	Number of Circuits
ON Semiconductor MC100EPT25DTR2G	Unidirectional	1	8-TSSOP	8-MSOP, 8-TSSOP	0.118 in	3 mm	Mixed Signal	Surface Mount	ECL	Non-Inverted	85 °C	-40 °C	LVTTL	1
ON Semiconductor MC100EPT25MNR4G	Unidirectional	1	8-DFN (2x2)	8-VFDFN Exposed Pad			Mixed Signal	Surface Mount	ECL	Non-Inverted	85 °C	-40 °C	LVTTL	1

Catalog

Translator, Differential LVECL / ECL to LVTTL

Key Features

• 1.1ns Typical Propagation Delay

• Maximum Frequency > 275 MHz Typical

• Operating Range: VCC= 3.0 V to 3.6 V; VEE= -5.5 V to -3.0 V; GND = 0 V

• 24mA TTL outputs

• Q Output will default LOW with inputs open or at GND

• VBBOutput

• Open Input Default State

• Safety Clamp on Inputs

• Pb-Free Packages are Available

Description

The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.The VBBoutput allows the EPT25 to also be used in a single-ended input mode. In this mode the VBBoutput is tied to the D input for a inverting buffer or the Dbar input for a non-inverting buffer. If used, the VBBpin should be bypassed to ground with at least a 0.01 µF capacitor.