74AVC1T1022GU Series

1-to-4 fan-out buffer

Manufacturer: Nexperia

Catalog

1-to-4 fan-out buffer

Part	Input	Supplier Device Package [y]	Supplier Device Package [x]	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Differential - Input:Output	Output	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Circuits	Type	Ratio - Input:Output
Nexperia 74AVC1T1022GUX	Clock	1.8	1.4	10-XQFN	125 °C	-40 °C	Surface Mount		Clock	10-XFQFN	0.8 V	3.6 V	1	Fanout Buffer (Distribution)	1:4

Catalog

1-to-4 fan-out buffer

Key Features

• Wide supply voltage range:

• VCC(A): 0.8 V to 3.6 V

• VCC(B): 0.8 V to 3.6 V

• Complies with JEDEC standards:

• JESD8-12 (0.8 V to 1.3 V)

• JESD8-11 (0.9 V to 1.65 V)

• JESD8-7 (1.2 V to 1.95 V)

• JESD8-5 (1.8 V to 2.7 V)

• JESD8-B (2.7 V to 3.6 V)

• Maximum data rates:

• 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

• 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

• 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

• 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

• 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

• 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

• Latch-up performance exceeds 100 mA per JESD 78 Class II

• Inputs accept voltages up to 3.6 V

• ESD protection:

• HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V

• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

Description

The 74AVC1T1022 is a translating 1-to-4 fan-out buffer suitable for use in clock distribution. It has dual supplies (VCC(A)and VCC(B)) for voltage translation. It also has a data input (A), four data outputs (1Yn and 2Yn) and an output enable input (OE). VCC(A)and VCC(B)can be independently supplied at any voltage between 0.8 V and 3.6 V. It makes the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The levels of A,OEand 1Yn are referenced to VCC(A), outputs 2Yn are referenced to VCC(B). This supply configuration ensures that two of the fanned out signals can be used in level shifting. A HIGH onOEcauses all outputs to be pulled LOW via pull-down resistors, a LOW onOEdisconnects the pull-down resistors and enables all outputs.