LTC2152-14 Series

Single 14-Bit 250Msps ADCs

Catalog

Single 14-Bit 250Msps ADCs

Part	Package / Case	Data Interface	Input Type	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Ratio - S/H:ADC	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Mounting Type	Reference Type	Number of Bits	Configuration	Sampling Rate (Per Second)	Number of Inputs	Operating Temperature [Max]	Operating Temperature [Min]	Architecture	Supplier Device Package	Number of A/D Converters
Analog Devices LTC2152IUJ-14#PBF	40-WFQFN Exposed Pad	LVDS - Parallel	Differential	1.9 V	1.7 V	1:1	1.7 V	1.9 V	Surface Mount	External Internal	14	S/H-ADC	250 M	1	85 °C	-40 °C	Pipelined	40-QFN (6x6)	1
Analog Devices LTC2152IUJ-14#TRPBF	40-WFQFN Exposed Pad	LVDS - Parallel	Differential	1.9 V	1.7 V	1:1	1.7 V	1.9 V	Surface Mount	External Internal	14	S/H-ADC	250 M	1	85 °C	-40 °C	Pipelined	40-QFN (6x6)	1
Analog Devices LTC2152CUJ-14#TRPBF	40-WFQFN Exposed Pad	LVDS - Parallel	Differential	1.9 V	1.7 V	1:1	1.7 V	1.9 V	Surface Mount	External Internal	14	S/H-ADC	250 M	1	70 °C	0 °C	Pipelined	40-QFN (6x6)	1
Analog Devices LTC2152IUJ-12#TRPBF	40-WFQFN Exposed Pad	LVDS - Parallel	Differential	1.9 V	1.7 V	1:1	1.7 V	1.9 V	Surface Mount	External Internal	12 bits	S/H-ADC	250 M	1	85 °C	-40 °C	Pipelined	40-QFN (6x6)	1

Catalog

Single 14-Bit 250Msps ADCs

Key Features

• 68.5dB SNR

• 90dB SFDR

• Low Power: 347mW/333mW/306mW Total

• Single 1.8V Supply

• DDR LVDS Outputs

• Easy-to-Drive 1.5VP-PInput Range

• 1.25GHz Full Power Bandwidth S/H

• Optional Clock Duty Cycle Stabilizer

• Low Power Sleep and Nap Modes

• Serial SPI Port for Configuration

• Pin-Compatible 14-Bit Versions

• 40-Lead (6mm × 6mm) QFN Package

Description

The LTC2152-12/LTC2151-12/LTC2150-12 are a family of 250Msps/210Msps/170Msps 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 68.5dB SNR and 90dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to undersample high input frequencies with good performance. The latency is only five clock cycles.DC specs include ±0.26LSB INL (typ), ±0.16LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.54LSBRMS.The digital outputs are double-data rate (DDR) LVDS.The ENC+and ENC–inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.BitsLTC2152-1212LTC2152-1414ApplicationsCommunicationsCellular BasestationsSoftware Defined RadiosMedical ImagingHigh Definition VideoTesting and Measurement Instruments