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CPLD MAX® V FAMILY 64 MACRO CELLS 118.3MHZ 1.8V 64-PIN MICRO FBGA TRAY
| Part | Number of Macrocells | Number of Logic Elements/Blocks | Number of I/O | Supplier Device Package | Operating Temperature [Min] | Operating Temperature [Max] | Voltage Supply - Internal [Min] | Voltage Supply - Internal [Max] | Mounting Type | Delay Time tpd(1) Max [Max] | Programmable Type |
|---|---|---|---|---|---|---|---|---|---|---|---|
Altera | 64 | 80 | 30 I/O | 64-MBGA (4.5x4.5) | 0 °C | 85 °C | 1.71 V | 1.89 V | Surface Mount | 7.5 ns | In System Programmable |
Altera | 64 | 80 | 30 I/O | 64-MBGA (4.5x4.5) | 0 °C | 85 °C | 1.71 V | 1.89 V | Surface Mount | 7.5 ns | In System Programmable |