PI6CB33402 Series

Very Low Power 4-Output PCIe Clock Buffer With On-Chip Termination

Catalog

Very Low Power 4-Output PCIe Clock Buffer With On-Chip Termination

Part	Supplier Device Package	Input	Ratio - Input:Output	Type	Output	Frequency - Max [Max]	Package / Case	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Circuits	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Operating Temperature [Max]	Operating Temperature [Min]
Diodes Inc PI6CB33402ZHIEX	32-TQFN (5x5)	HCSL	1:4	Fanout Buffer (Distribution)	HCSL	133.33 MHz	32-VFQFN Exposed Pad	Surface Mount	3.465 V	3.135 V	1			85 °C	-40 °C

Catalog

Very Low Power 4-Output PCIe Clock Buffer With On-Chip Termination

Key Features

• 3V Supply Voltage

• HCSL Input: 100MHz, also Support 50MHz, 125MHz or 133.33MHz via SMBus

• 4 Differential Low Power HCSL Outputs with On-Chip Termination

• Default ZOUT= 85Ω

• Spread Spectrum Tolerant

• Individual Output Enable

• Programmable Slew Rate and Output Amplitude for each Output

• Differential Outputs Blocked Until PLL is Locked

• Strapping Pins or SMBus for Configuration

• Differential Output-to-Output Skew <50ps

• Very Low Jitter OutputsDifferential Cycle-to-Cycle Jitter <50psPCIe Gen 1/Gen 2/Gen3 /Gen 4/Gen 5 CC CompliantPCIe Gen 2 and 3 SRiS and SRnS Compliant

• Differential Cycle-to-Cycle Jitter <50ps

• PCIe Gen 1/Gen 2/Gen3 /Gen 4/Gen 5 CC Compliant

• PCIe Gen 2 and 3 SRiS and SRnS Compliant

• Packaging (Pb-free & Green):32-contact, 5mm×5mm TQFN (W-QFN5050-32)

• 32-contact, 5mm×5mm TQFN (W-QFN5050-32)

• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

• Halogen and Antimony Free. "Green" Device (Note 3)

• For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), pleasecontact usor your local Diodes representative.https://www.diodes.com/quality/product-definitions/

Description

The PI6CB33402 is a 4-output very low power PCIe® Gen 1/Gen 2/Gen 3/Gen 4/Gen 5 clock buffer. It takes a reference input to fanout four 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier. Individual OE pin for each output provides easier power management.