ZL30731 Series

One Channel SyncE&1588 Network Synchronizer

Catalog

One Channel SyncE&1588 Network Synchronizer

Part	Number of Circuits	Frequency - Max [Max]	Mounting Type	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Package / Case	Supplier Device Package	Main Purpose	Voltage - Supply	Ratio - Input:Output [custom]	Ratio - Input:Output [custom]	PLL	Output	Operating Temperature [Max]	Operating Temperature [Min]
Microchip Technology ZL30731LDG1S	1	750 MHz	Surface Mount			48-VFQFN Exposed Pad	48-QFN (7x7)	Memory	1.8 V, 3.3 V	10	5		CMOS	85 °C	-40 °C

Catalog

One Channel SyncE&1588 Network Synchronizer

Key Features

• Highlights* Combined with IEEE 1588-2008 Precision Time Protocol Stack and Synchronization Algorithm software modules

• * Ultra Precise Timing for 5G Radio Access Networks

• * One independent DPLL clock channel plus three additional DPLLs for NCO Hybrid, Split XO and redundant oscillator modes

• * Five output synthesizers

• * Any-to-any frequency conversion per channel

• * Inputs: up to 10, differential or single-ended

• * Outputs: up to 10 differential, up to 20 CMOS

• * Output jitter 100 fs RMS typical for 156.25 MHz 12 kHz to 20 MHz

• * Core power consumption <0.9W

•

• Packet and/or physical-layer frequency, phase and time synchronization* Physical-layer compliance with ITU-T G.8262, G.8262.1, G.813, G.812, Telcordia GR-1244, GR-253

• * Packet-timing compliance with ITU-T G.8261, G.8263, G.8273.2 (class A,B,C,D), G.8273.4

• * Enables 5G wireless applications with sub-100 ns time/phase alignment requirements

• * Hitless reference switching

•

• General Features* Automatic self-configuration at power-up from internal Flash memory, 7 configurations

• * Input-to-output alignment <100 ps

• * Numerically controlled oscillator behavior in each DPLL and each synthesizer

• * Easy-to-configure design requires no external VCXO or loop filter components

• * 5 GPIO pins with many possible behaviors, each REF can be GPI, each OUT can be GPO

• * SPI or I2C processor Interface

• * 1.8V and 3.3V core VDD voltages

• * Easy-to-use evaluation/programming software

Description

The ZL30731 is a feature-rich network synchronization solution with up to four independent DPLLs and five extremely low output jitter synthesizers combined with IEEE 1588-2008 Precision Time Protocol Stack and Synchronization Algorithm software packages. This is an ideal central Timing solution for applications such as routers, switches, optical transparent network and 4G/5G wireless base stations (CU/DU/RU). We also have ZL3064x as line card jitter attenuators, such as [**ZL30642A**](https://www.microchip.com/wwwproducts/en/ZL30642A), to form full SyncE&IEEE1588 Timing solution for any rack system. [Click here to know about our full IEEE1588 software solution and profiles we can support.](https://www.microchip.com/en-us/product/ZLS30390)