74HCT138PW Series

3-to-8 line decoder/demultiplexer; inverting

Manufacturer: Freescale Semiconductor - NXP

Catalog

3-to-8 line decoder/demultiplexer; inverting

Part	Supplier Device Package	Package / Case [x]	Package / Case	Package / Case [y]	Mounting Type	Voltage Supply Source	Type	Operating Temperature [Max]	Operating Temperature [Min]	Circuit	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Independent Circuits	Package / Case	Package / Case
Freescale Semiconductor - NXP 74HCT138PW,112	16-TSSOP	0.173 in	16-TSSOP	4.4 mm	Surface Mount	Single Supply	Decoder/Demultiplexer	125 °C	-40 °C	1 x 3:8	4.5 V	5.5 V	4 mA	4 mA	1
Freescale Semiconductor - NXP 74HCT138PW,118	16-TSSOP	0.173 in	16-TSSOP	4.4 mm	Surface Mount	Single Supply	Decoder/Demultiplexer	125 °C	-40 °C	1 x 3:8	4.5 V	5.5 V	4 mA	4 mA	1
Freescale Semiconductor - NXP 74HCT138PW,118	16-TSSOP	0.173 in	16-TSSOP	4.4 mm	Surface Mount	Single Supply	Decoder/Demultiplexer	125 °C	-40 °C	1 x 3:8	4.5 V	5.5 V	4 mA	4 mA	1
Freescale Semiconductor - NXP 74HCT138N,652	16-DIP		16-DIP		Through Hole	Single Supply	Decoder/Demultiplexer	125 °C	-40 °C	1 x 3:8	4.5 V	5.5 V	4 mA	4 mA	1	0.3 in	7.62 mm

Catalog

3-to-8 line decoder/demultiplexer; inverting

Key Features

• Wide supply voltage range from 2.0 to 6.0 V

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Demultiplexing capability

• Multiple input enable for easy expansion

• Ideal for memory chip select decoding

• Active LOW mutually exclusive outputs

• Input levels:

• For 74HC138: CMOS level

• For 74HCT138: TTL level

• Complies with JEDEC standards:

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• ESD protection:

• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

• Multiple package options

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Description

The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 toY7). The device features three enable inputs (E1,E2 and E3). Every output will be HIGH unlessE1 andE2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '138 ICs and one inverter. The '138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.