100LVELT22 Series

Translator, Dual LVTTL / LVCMOS to Differential LVPECL

Catalog

Translator, Dual LVTTL / LVCMOS to Differential LVPECL

Part	Supplier Device Package	Channels per Circuit	Input Signal	Number of Circuits	Channel Type	Package / Case	Package / Case [custom]	Package / Case	Mounting Type	Translator Type	Output Type	Operating Temperature [Max]	Operating Temperature [Min]	Output Signal	Package / Case [y]	Package / Case [x]
ON Semiconductor MC100LVELT22DT	8-TSSOP	2	LVCMOS, LVTTL	1	Unidirectional	8-MSOP, 8-TSSOP	0.118 in	3 mm	Surface Mount	Mixed Signal	Differential	85 °C	-40 °C	LVPECL
ON Semiconductor MC100LVELT22MNRG	8-DFN (2x2)	2	LVCMOS, LVTTL	1	Unidirectional	8-VFDFN Exposed Pad			Surface Mount	Mixed Signal	Differential	85 °C	-40 °C	LVPECL
ON Semiconductor 100LVELT22M	8-SOIC	2	LVCMOS, LVTTL	1	Unidirectional	8-SOIC			Surface Mount	Mixed Signal	Differential	85 °C	-40 °C	LVPECL	3.9 mm	0.154 in
ON Semiconductor MC100LVELT22DTRG	8-TSSOP	2	LVCMOS, LVTTL	1	Unidirectional	8-MSOP, 8-TSSOP	0.118 in	3 mm	Surface Mount	Mixed Signal	Differential	85 °C	-40 °C	LVPECL
ON Semiconductor 100LVELT22MX	8-SOIC	2	LVCMOS, LVTTL	1	Unidirectional	8-SOIC			Surface Mount	Mixed Signal	Differential	85 °C	-40 °C	LVPECL	3.9 mm	0.154 in
ON Semiconductor MC100LVELT22DTG	8-TSSOP	2	LVCMOS, LVTTL	1	Unidirectional	8-MSOP, 8-TSSOP	0.118 in	3 mm	Surface Mount	Mixed Signal	Differential	85 °C	-40 °C	LVPECL

Catalog

Translator, Dual LVTTL / LVCMOS to Differential LVPECL

Key Features

• 350ps Typical Propagation Delay

• <100ps Output-to-Output Skew

• ESD Protection: >4 KV HBM, >200 V MM

• Flow Through Pinouts

• The 100 Series Contains Temperature Compensation

• LVPECL Operating Range: VCC= 3.15 V to 3.45 V with GND= 0 V

• When Unused TTL Input is left Open, Q Output will Default High

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level 1For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34

• Transistor Count = 164 devices

• Pb-Free Packages are Available

Description

The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.