SN74AVC2T244 Series

Dual-Bit Dual-Supply Bus Transceiver

Catalog

Dual-Bit Dual-Supply Bus Transceiver

Part	Supplied Contents	Function	Type	Embedded	Utilized IC / Part	Primary Attributes	Supplier Device Package	Output Type	Channels per Circuit	Number of Circuits	Channel Type	Translator Type	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - VCCA [Max]	Voltage - VCCA [Min]	Mounting Type	Package / Case	Data Rate	Voltage - VCCB [Min]	Voltage - VCCB [Max]
Texas Instruments SN74AVC2T244EVM	Board(s)	Logic-Level Translator	Interface		SN74AVC2T244	2 Channel Bi-Directional
Texas Instruments SN74AVC2T244DQMR							8-X2SON (1.8x1.2)	Non-Inverted Tri-State	2	1	Unidirectional	Voltage Level	85 °C	-40 °C	3.6 V	0.9 V	Surface Mount	8-XFDFN	380 Mbps	0.9 V	3.6 V

Catalog

Dual-Bit Dual-Supply Bus Transceiver

Key Features

• Wide Operating VCCRange of 0.9 V to 3.6 VLow Static-Power Consumption, 6-µA Max ICCOutput Enable Feature Allows User to Disable Outputs to Reduce Power Consumption±24-mA Output Drive at 3.0 VIoffSupports Partial Power-Down-Mode OperationInput Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at InputMaximum Data Rates380 Mbps (1.8-V to 3.3-V Translation)200 Mbps (<1.8-V to 3.3-V Translation)200 Mbps (Translate to 2.5 V or 1.8 V)150 Mbps (Translate to 1.5 V)100 Mbps (Translate to 1.2 V)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 225000-V Human-Body Model (A114-A)Wide Operating VCCRange of 0.9 V to 3.6 VLow Static-Power Consumption, 6-µA Max ICCOutput Enable Feature Allows User to Disable Outputs to Reduce Power Consumption±24-mA Output Drive at 3.0 VIoffSupports Partial Power-Down-Mode OperationInput Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at InputMaximum Data Rates380 Mbps (1.8-V to 3.3-V Translation)200 Mbps (<1.8-V to 3.3-V Translation)200 Mbps (Translate to 2.5 V or 1.8 V)150 Mbps (Translate to 1.5 V)100 Mbps (Translate to 1.2 V)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 225000-V Human-Body Model (A114-A)

Description

This 2-bit unidirectional translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCAaccepts any supply voltage from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCBaccepts any supply voltage from 0.9 V to 3.6 V. This allows for low-voltage translation between 0.9-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V and 3.6-V voltage nodes. For the SN74AVC2T244, when the output-enable (OE) input is high, all outputs are placed in the high-impedance state. The SN74AVC2T244 is designed so that theOEinput circuit is referenced to VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This 2-bit unidirectional translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCAaccepts any supply voltage from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCBaccepts any supply voltage from 0.9 V to 3.6 V. This allows for low-voltage translation between 0.9-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V and 3.6-V voltage nodes. For the SN74AVC2T244, when the output-enable (OE) input is high, all outputs are placed in the high-impedance state. The SN74AVC2T244 is designed so that theOEinput circuit is referenced to VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.