SN74F377A Series

Octal D-Type Flip-Flop With Clock Enable

Catalog

Octal D-Type Flip-Flop With Clock Enable

Part	Max Propagation Delay @ V, Max CL	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Quiescent (Iq)	Function	Trigger Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Type	Number of Elements	Number of Bits per Element	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Mounting Type	Clock Frequency	Package / Case	Package / Case [y]	Package / Case [y]	Supplier Device Package
Texas Instruments SN74F377ADW	9 ns	4.5 V	5.5 V	72 mA	Standard	Positive Edge	1 mA	20 mA	D-Type	1	8	70 °C	0 °C	Non-Inverted	Surface Mount	125 MHz	20-SOIC	0.295 in	7.5 mm	20-SOIC
Texas Instruments SN74F377ADWR	9 ns	4.5 V	5.5 V	72 mA	Standard	Positive Edge	1 mA	20 mA	D-Type	1	8	70 °C	0 °C	Non-Inverted	Surface Mount	125 MHz	20-SOIC	0.295 in	7.5 mm	20-SOIC

Catalog

Octal D-Type Flip-Flop With Clock Enable

Key Features

• Contains Eight D-Type Flip-Flops With Single-Rail OutputsClock Enable Latched to Avoid False ClockingApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsBuffered Common Enable InputPackage Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPsContains Eight D-Type Flip-Flops With Single-Rail OutputsClock Enable Latched to Avoid False ClockingApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsBuffered Common Enable InputPackage Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

Description

The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse ifis low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at theinput. The SN74F377A is characterized for operation from 0°C to 70°C. The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse ifis low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at theinput. The SN74F377A is characterized for operation from 0°C to 70°C.