Catalog
USB Hub Firmware Memory
Key Features
• * Targeted for USB 2.0 High-Speed infotainment applications including:
• Integration with head unit systems
• First, second, and third row USB media hubs
•
• + Factory pre-program support for Production
•
• * 512 KByte (4 Mbit) memory size
• * Single Voltage Read and Write Operations- 2.7–3.6V
• * Serial Interface Architecture- SPI Compatible: Mode 0 and Mode 3
•
• + Read Support: Dual Input/Output I/O
• + High Speed Clock Frequency up to 40 MHz
•
• * Superior Reliability:
•
• + Endurance: 100,000 Cycles (typical)
• + Greater than 20 years Data Retention
•
• * Low Power Consumption:
• Active Read Current: 5 mA (typical)
• Standby Current: 5 µA (typical)
• Power-down Mode: 3µA (typical)
• * Flexible Erase Capability:
•
• + Uniform 4 KByte sectors
• + Uniform 64 KByte overlay blocks
•
• * Fast Erase and Byte-Program:
• Sector-Erase Time: 40 ms (typical)
• Byte-Program Time: 4 ms/256 bytes (typical)
•
• + End-of-Write Detection- Software polling the BUSY bit in Status Register
•
• * Hold Pin (HOLD#)- Suspends a serial sequence to the memorywithout deselecting the device
• * Write Protection (WP#)- Enables/Disables the Lock-Down function of the status register
• * Software Write Protection- Write protection through Block-Protection bits instatus register
• * Automotive Grade 1: -40°C to +125°C, Grade 2: -40°C to +105°C, Grade 3: -40°C to +85°C
• * Packages Available
•
• + 8-lead SOIC (150 mils), 8-contact UDFN (2 x 3 mm)
• + All devices are RoHS compliant
Description
AI
USBF4100, a USB Firmware memory chip, is a companion to the USB SmartHub™ family of controllers. Full custom programming alternatives are available upon request with latest version of the binary firmware, which contains application firmware and default hub configuration settings. The USBF4100 assures proper functionality, providing for decreased development time and engineering resource, and overall faster time to market.
The USB Firmware memory family features a four-wire, SPI-compatible interface that allows for a low pin-count package, which occupies less board space and ultimately lowers total system costs. It is manufactured with proprietary,
high-performance CMOS SuperFlash technology.
The split-gate cell design and thick-oxide tunneling
injector attain better reliability and manufacturability
compared with alternate approaches.