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SST38VF6401B Series

Manufacturer: Microchip Technology

Catalog

Key Features

* Organized as 4M x16
* Single Voltage Read and Write Operations– 2.7-3.6V
* Superior Reliability– Endurance: 100,000 Cycles minimum– Greater than 100 years Data Retention
* Low Power Consumption (typical values at 5 MHz)– Active Current: 25 mA (typical)– Standby Current: 5 µA (typical)– Auto Low Power Mode: 5 µA (typical)
* 128-bit Unique ID
* Security-ID Feature– 248 Word, user One-Time-Programmable
* Protection and Security Features– Hardware Boot Block Protection/WP# Input Pin, Uniform(32 KWord) and Non-Uniform (8 KWord) optionsavailable– User-controlled individual block (32 KWord) protection,using software only methods– Password protection
* Hardware Reset Pin (RST#)
* Fast Read and Page Read Access Times:– 70 ns Read access time– 25 ns Page Read access times- 8-Word Page Read buffer
* Latched Address and Data
* Fast Erase Times:– Block-Erase Time: 18 ms (typical)– Chip-Erase Time: 40 ms (typical)
* Erase-Suspend/-Resume Capabilities
* Fast Word and Write-Buffer Programming Times:– Word-Program Time: 7 µs (typical)– Write Buffer Programming Time: 1.75 µs / Word (typical)- 16-Word Write Buffer
* Automatic Write Timing– Internal VPP Generation
* End-of-Write Detection– Toggle Bits– Data# Polling– RY/BY# Output
* CMOS I/O Compatibility
* JEDEC Standard– Flash EEPROM Pinouts and command sets
* CFI Compliant
* Packages Available– 48-lead TSOP– 48-ball TFBGA
* All non-Pb (lead-free) devices are RoHS compliant

Description

AI
The SST38VF6401B/6402B/6403B/6404B are 4M x16 CMOS Advanced Multi-Purpose Flash Plus (Advanced MPF+) devices manufactured with SST proprietary, high-performance CMOS Super- Flash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST38VF6401B/6402B/6403B/6404B write (Program or Erase) with a 2.7-3.6V power supply. This device conforms to JEDEC standard pin assignments for x16 memories. Please see documents section for the Silicon Errata for this device.