SN74ALS273 Series

Octal D-Type Positive-Edge-Triggered Flip-Flops With Clear

Catalog

Octal D-Type Positive-Edge-Triggered Flip-Flops With Clear

Part	Max Propagation Delay @ V, Max CL	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case	Package / Case	Operating Temperature [Max]	Number of Elements	Clock Frequency	Trigger Type	Mounting Type	Supplier Device Package	Type	Package / Case [y]	Package / Case [y]
Texas Instruments SN74ALS273NSR	15 ns	24 mA	2.6 mA	Non-Inverted	8	4.5 V	5.5 V	20-SOIC	0.209 "	5.3 mm	70 °C	1	35 MHz	Positive Edge	Surface Mount	20-SO	D-Type
Texas Instruments SN74ALS273N	15 ns	24 mA	2.6 mA	Non-Inverted	8	4.5 V	5.5 V	20-DIP	0.3 in	7.62 mm	70 °C	1	35 MHz	Positive Edge	Through Hole	20-PDIP	D-Type
Texas Instruments SN74ALS273DWR	15 ns	24 mA	2.6 mA	Non-Inverted	8	4.5 V	5.5 V	20-SOIC			70 °C	1	35 MHz	Positive Edge	Surface Mount	20-SOIC	D-Type	0.295 in	7.5 mm
Texas Instruments SN74ALS273DWRG4	15 ns	24 mA	2.6 mA	Non-Inverted	8	4.5 V	5.5 V	20-SOIC			70 °C	1	35 MHz	Positive Edge	Surface Mount	20-SOIC	D-Type	0.295 in	7.5 mm

Catalog

Octal D-Type Positive-Edge-Triggered Flip-Flops With Clear

Key Features

• Contain Eight Flip-Flops With Single-Rail OutputsBuffered Clock and Direct-Clear InputsIndividual Data Input to Each Flip-FlopApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsContain Eight Flip-Flops With Single-Rail OutputsBuffered Clock and Direct-Clear InputsIndividual Data Input to Each Flip-FlopApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

Description

These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C. These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.