74SSTUBF32866B Series

25-Bit Configurable Registered Buffer for DDR2

Catalog

25-Bit Configurable Registered Buffer for DDR2

Part	Supply Voltage (Min)	Supply Voltage (Max)	Logic Type	Operating Temperature (Max)	Operating Temperature (Min)	Number of Bits (Max)	Number of Bits	Number of Bits (Min)	Package / Case	Package Name	Package Width	Package Length	Mounting Type
Renesas Electronics Corporation 74SSTUBF32866BBFG	1.7 V	1.9 V	1:1 1:2 1:2 Configurable Registered Buffer with Parity Configurable Registered Buffer Parity	70 °C	0 °C	25 bits	14 25	14 bits	96-LFBGA	96-CABGA	5.5 mm	13.5 mm	Surface Mount

25-Bit Configurable Registered Buffer for DDR2

Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.