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Key Features

+ 2.6ns typical propagation delay
+ Differential ECL inputs
+ 24mA TTL outputs
+ Flow-through pinouts
+ Available in 8-pin SOIC package

Description

AI
The SY100ELT25 is a differential ECL-to-TTL translator. Because ECL levels are used, a +5V, -5.2V (or -4.5V) and ground are required. The small outline 8- lead SOIC package and the single gate of the ELT25 makes it ideal for those applications where performance, space and low power are at a premium.The VBB output allows the ELT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a non-inverting buffer or the D input for an inverting buffer. If used the VBB pin should be bypassed to ground via a 0.01µF capacitor.