Catalog
BITS/SSU Timing Interface IC
Key Features
• Multi-Protocol BITS/SSU Transmitter and Receiver* Receive and transmit T1, E1, 2048 kHz, and 6312 kHz timing signals
• * Insert and extract SSM messages (T1, E1)
• * T1 SF or ESF formats
• * E1 FAS, CAS and/or CRC-4 framing
• * J1 support (T1 with Japanese CRC-6 & RAI)
• * Short-haul and long-haul line interfaces
• * Internal software-selectable termination (75Ω, 100Ω, 110Ω, or 120Ω) or external termination
• * High-impedance receive inputs and transmit outputs for no-relay redundancy
• * Local and remote loopbacks
• * Receiver automatic receive sensitivity adjustment and signal level indication
• * Receiver LOS, OOF, RAI and AIS status
• * Transmitter flexible waveform generation
• * Transmitter DSX-1 line build-outs
• * Transmitter E1 waveforms include G.703 waveshapes for both 75 coax and 120 twisted pair cables
• * Transmitter AIS and alternating ones and zeros generation
• * Transmitter and receiver power-down controls
• * Transmitter and receiver short-circuit detection
• * Transmitter open-circuit detection
• * Internal loopbacks between transmitter and receiver for fault detection
Description
AI
ZL81001 provides a single T1/E1/J1 transceiver (transmitters plus receivers) specifically designed for BITS/SSU timing in carrier-class telecommunications equipment. Each transceiver provides full support for T1, E1, J1 and G.703 2048kHz synchronization signals in and out and includes SSM message insertion and extraction. The device also includes two composite clock (CC) receivers and two general-purpose CMOS clock inputs to provide additional support as needed for legacy interfaces.
Another part, [ZL81000](https://www.microchip.com/en-us/product/ZL81000) provides two T1/E1/J1 transceivers to address BITS/SSU Timing applications as well.
[Click here for secure documentation](https://www.microsemi.com/product-directory/pdh-t1e1/5572-zl81001#resources)