Catalog
100fs Jitter Clock Generator
Key Features
• Highlights* Output jitter 100 fs RMS typical for 156.25 MHz
• * 12 kHz to 20 MHz
• * Any-to-any frequency conversion
• * Five output frequency synthesizers
• * Core power consumption <0.9W
• * Crystal: 24-60 MHz
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• Output Clocks* Any frequency 0.5 Hz to 750 MHz
• * Each OUTP/N pair can be LVDS, LVPECL, 2xCMOS, Low-VCM, or programmable differential
• * In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125 MHz and 25 MHz)
• * VDD per output pair, CMOS voltages 1.8V to 3.3V
• * Per-synth phase adjustment, 1 ps resolution
• * Per-output duty cycle adjustment
• * Precise output alignment circuitry and per-output phase adjustment
• * Per-output enable/disable and glitchless start/stop (stop high or low)
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• General Features* Automatic self-configuration at power-up from internal Flash memory, 7 configurations
• * Numerically controlled oscillator behavior in each synthesizer
• * Easy-to-configure design requires no external VCXO or loop filter components
• * 5 GPIO pins with many possible behaviors, each OUT can be GPO
• * SPI or I2C processor Interface
• * 1.8V and 3.3V core VDD voltages
• * Easy-to-use evaluation/programming software
Description
AI
The ZL30270 is a feature-rich clock generator with five extremely low output jitter synthesizers and six outputs. This device is ideal for frequency synthesis in a wide variety of equipment types requiring low jitter (<150fs) and multiple frequency families.