LTC2165 Series

16-Bit, 125Msps Low Power ADCs

Catalog

16-Bit, 125Msps Low Power ADCs

Part	Mounting Type	Number of Inputs	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Configuration	Reference Type	Number of Bits	Package / Case	Sampling Rate (Per Second)	Number of A/D Converters	Architecture	Ratio - S/H:ADC	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Input Type	Data Interface	Supplier Device Package
Analog Devices LTC2165CUK#PBF	Surface Mount	1	1.9 V	1.7 V	70 °C	0 °C	S/H-ADC	External Internal	16	48-WFQFN Exposed Pad	125 M	1	Pipelined	1:1	1.7 V	1.9 V	Differential	LVDS - Parallel Parallel	48-QFN (7x7)
Analog Devices LTC2165IUK#PBF	Surface Mount	1	1.9 V	1.7 V	85 °C	-40 °C	S/H-ADC	External Internal	16	48-WFQFN Exposed Pad	125 M	1	Pipelined	1:1	1.7 V	1.9 V	Differential	LVDS - Parallel Parallel	48-QFN (7x7)
Analog Devices LTC2165IUK#TRPBF	Surface Mount	1	1.9 V	1.7 V	85 °C	-40 °C	S/H-ADC	External Internal	16	48-WFQFN Exposed Pad	125 M	1	Pipelined	1:1	1.7 V	1.9 V	Differential	LVDS - Parallel Parallel	48-QFN (7x7)

Catalog

16-Bit, 125Msps Low Power ADCs

Key Features

• 76.8dB SNR

• 90dB SFDR

• Low Power: 194mW/163mW/108mW

• Single 1.8V Supply

• CMOS, DDR CMOS, or DDR LVDS Outputs

• Selectable Input Ranges: 1VP-Pto 2VP-P

• 550MHz Full Power Bandwidth S/H

• Optional Data Output Randomizer

• Optional Clock Duty Cycle Stabilizer

• Shutdown and Nap Modes

• Serial SPI Port for Configuration

• 48-Pin (7mm × 7mm) QFN Package

Description

The LTC2165/LTC2164/LTC2163 are sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 76.8dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.4LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+and ENC–inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.ApplicationsCommunicationsCellular Base StationsSoftware Defined RadiosPortable Medical ImagingMultichannel Data AcquisitionNondestructive Testing