Catalog
6.2 GHzFractional-N Frequency Synthesizer
Part | Supplied Contents | Utilized IC / Part | Type | Contents | Function | Primary Attributes | Embedded | Secondary Attributes | Output | Operating Temperature [Min] | Operating Temperature [Max] | PLL | Voltage - Supply [Min] | Voltage - Supply [Max] | Package / Case [x] | Package / Case | Package / Case [x] | Mounting Type | Supplier Device Package | Ratio - Input:Output [custom] | Input | Differential - Input:Output | Number of Circuits |
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Analog Devices Inc EV-ADF4156SD1Z | Board(s) | ADF4156 | Timing | Board(s) | Frequency Synthesizer | Single Fractional-N PLL | 6.2 GHz | ||||||||||||||||
Analog Devices Inc ADF4156BRUZ | Fractional N Synthesizer (RF) | Clock | -40 °C | 85 °C | 2.7 V | 3.3 V | 0.173 " | 16-TSSOP | 4.4 mm | Surface Mount | 16-TSSOP | 2:1 | CMOS, TTL | Yes/No | 1 | ||||||||
Analog Devices Inc ADF4156BCPZ-RL | Fractional N Synthesizer (RF) | Clock | -40 °C | 85 °C | 2.7 V | 3.3 V | 20-WFQFN Exposed Pad, CSP | Surface Mount | 20-LFCSP (4x4) | 2:1 | CMOS, TTL | Yes/No | 1 | ||||||||||
Analog Devices Inc ADF4156BCPZ-RL7 | Fractional N Synthesizer (RF) | Clock | -40 °C | 85 °C | 2.7 V | 3.3 V | 20-WFQFN Exposed Pad, CSP | Surface Mount | 20-LFCSP (4x4) | 2:1 | CMOS, TTL | Yes/No | 1 |
Key Features
• RF bandwidth to 6.2 GHz
• 2.7 V to 3.3 V power supply
• Separate VPallows extended tuning voltage
• Programmable fractional modulus
• Programmable charge pump currents
• 3-wire serial interface
• Digital lock detect
• Power-down mode
• Pin compatible with the ADF4110, ADF4111, ADF4112, ADF4113, ADF4106, ADF4153, and ADF4154 frequency synthesizers
• Programmable RF output phase
• Loop filter design possible with ADIsimPLL
• Cycle slip reduction for faster lock times
Description
AI
The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ∑∆ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4156 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.ApplicationsCATV equipmentBase stations for mobile radio (WiMAX, GSM, PCS, DCS, SuperCell 3G, CDMA, WCDMA)Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)Wireless LANs, PMRCommunications test equipment