SN74ACT1284 Series

7-Bit Bus Interfaces With 3-State Outputs

Catalog

7-Bit Bus Interfaces With 3-State Outputs

Part	Logic Type	Supplier Device Package	Package / Case	Package / Case [y]	Package / Case [y]	Operating Temperature [Max]	Mounting Type	Supply Voltage [Min]	Supply Voltage [Max]	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74ACT1284DW	IEEE STD 1284 Translation Transceiver	20-SOIC	20-SOIC	0.295 in	7.5 mm	70 °C	Surface Mount	4.5 V	5.5 V
Texas Instruments SN74ACT1284PWG4	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in
Texas Instruments SN74ACT1284PW	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in
Texas Instruments SN74ACT1284DBR	IEEE STD 1284 Translation Transceiver	20-SSOP	20-SSOP			70 °C	Surface Mount	4.5 V	5.5 V
Texas Instruments SN74ACT1284PWE4	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in
Texas Instruments SN74ACT1284NSR	IEEE STD 1284 Translation Transceiver	20-SO	20-SOIC			70 °C	Surface Mount	4.5 V	5.5 V		0.209 "	5.3 mm
Texas Instruments SN74ACT1284PWR	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in

Catalog

7-Bit Bus Interfaces With 3-State Outputs

Key Features

• 4.5-V to 5.5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 20 ns at 5 V3-State Outputs Directly Drive Bus LinesFlow-Through Architecture Optimizes PCB LayoutCenter-Pin VCCand GND Configurations Minimize High-Speed Switching NoiseESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Designed for the IEEE 1284-I (Level-1 Type) and IEEE 1284-II (Level-2 Type) Electrical Specifications4.5-V to 5.5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 20 ns at 5 V3-State Outputs Directly Drive Bus LinesFlow-Through Architecture Optimizes PCB LayoutCenter-Pin VCCand GND Configurations Minimize High-Speed Switching NoiseESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Designed for the IEEE 1284-I (Level-1 Type) and IEEE 1284-II (Level-2 Type) Electrical Specifications

Description

The ’ACT1284 devices are designed for asynchronous two-way communication between data buses. The control function minimizes external timing requirements. The devices allow data transmission in either the A-to-B or the B-to-A direction for bits 1, 2, 3, and 4, depending on the logic level at the direction-control (DIR) input. Bits 5, 6, and 7, however, always transmit in the A-to-B direction. The output drive for each mode is determined by the high-drive (HD) control pin. When HD is high, the high drive is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the drive requirements as specified in the IEEE 1284-I (level-1 type) and the IEEE 1284-II (level-2 type) parallel peripheral-interface specification. The ’ACT1284 devices are designed for asynchronous two-way communication between data buses. The control function minimizes external timing requirements. The devices allow data transmission in either the A-to-B or the B-to-A direction for bits 1, 2, 3, and 4, depending on the logic level at the direction-control (DIR) input. Bits 5, 6, and 7, however, always transmit in the A-to-B direction. The output drive for each mode is determined by the high-drive (HD) control pin. When HD is high, the high drive is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the drive requirements as specified in the IEEE 1284-I (level-1 type) and the IEEE 1284-II (level-2 type) parallel peripheral-interface specification.