LTC2353-16 Series
Buffered Dual, 16-Bit, 550ksps/Channel Differential ±10.24V ADC with 30VP-PCommon Mode Range
Manufacturer: Analog Devices
Catalog
Buffered Dual, 16-Bit, 550ksps/Channel Differential ±10.24V ADC with 30VP-PCommon Mode Range
Key Features
• Simultaneous Sampling of 2 Buffered Channels
• 550ksps per Channel Throughput
• 500pA/12nA Max Input Leakage at 85°C/125°C
• ±3.5LSB INL (Maximum, ±10.24V Range)
• Guaranteed 18-Bit, No Missing Codes
• Differential, Wide Common Mode Range Inputs
• Per-Channel SoftSpan Input Ranges:
• ±10.24V, 0V to 10.24V, ±5.12V, 0V to 5.12V
• ±12.5V, 0V to 12.5V, ±6.25V, 0V to 6.25V
• 96.4dB Single-Conversion SNR (Typical)
• −110dB THD (Typical) at fIN= 2kHz
• 124dB CMRR (Typical) at fIN= 200Hz
• Rail-to-Rail Input Overdrive Tolerance
• Integrated Reference and Buffer (4.096V)
• SPI CMOS (1.8V to 5V) and LVDS Serial I/O
• Internal Conversion Clock, No Cycle Latency
• 162mW Power Dissipation (Typical)
• 48-Lead (7mm x 7mm) LQFP Package
Description
AI
The LTC2353-18 is an 18-bit, low noise 2-channel simultaneous sampling successive approximation register (SAR) ADC with buffered differential, wide common mode range picoamp inputs. Operating from a 5V low voltage supply, flexible high voltage supplies, and using the internal reference and buffer, both channels of this SoftSpanTM ADC can be independently configured on a conversion-by-conversion basis to accept ±10.24V, 0V to 10.24V, ±5.12V, or 0V to 5.12V signals. One channel may also be disabled to increase throughput on the other channel.The integrated picoamp-input analog buffers, wide input common mode range and 124dB CMRR of the LTC2353-18 allow the ADC to directly digitize a variety of signals using minimal board space and power. This input signal flexibility, combined with ±3.5LSB INL, no missing codes at 18 bits, and 96.4dB SNR, makes the LTC2353-18 an ideal choice for many high voltage applications requiring wide dynamic range.The LTC2353-18 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Either one or two lanes of data output may be employed in CMOS mode, allowing the user to optimize bus width and throughput.ApplicationsProgrammable Logic ControllersIndustrial Process ControlPower Line MonitoringTest and Measurement