SY69753AL Series

Catalog

3.3V 155 MBPS CDR 32 TQFP 7X7X1.0MM TRAY ROHS COMPLIANT: YES

Part	Input	Mounting Type	Main Purpose	Number of Circuits	Output	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - Input:Output [custom]	Supplier Device Package [custom]	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Frequency - Max [Max]	Differential - Input:Output [custom]	Differential - Input:Output [custom]	PLL	Package / Case
Microchip Technology SY69753ALHG	PECL	Surface Mount	ATM OC-3, Ethernet, SONET/SDH	1	PECL	85 °C	-40 °C	1:3	7x7	32-TQFP-EP	3.45 V	3.15 V	155 Mbps				32-TQFP Exposed Pad
Microchip Technology SY69753ALHG-TR	PECL	Surface Mount	ATM OC-3, Ethernet, SONET/SDH	1	PECL	85 °C	-40 °C	1:3	7x7	32-TQFP-EP	3.45 V	3.15 V	155 Mbps				32-TQFP Exposed Pad

Catalog

Key Features

• + 3.3V power supply

• + SONET/SDH/ATM compatible

• + Clock and data recovery for 125Mbps/155Mbps NRZ data stream

• + Two on-chip PLLs: one for clock generation and another for clock recovery

• + Selectable reference frequencies

• + Differential PECL high-speed serial I/O

• + Line receiver input: no external buffering needed

• + Link fault indication

• + 100k ECL compatible I/O

• + Industrial temperature range (-40°C to +85°C)

• + Lower power: fully compatible with Micrel's SY87701V, but with 30% less power

• + Available in 32-pin ePad-TQFP

Description

The SY69753AL is a complete Clock Recovery and Data Retiming integrated circuit for OC-3/STS-3 applications at 155Mbps NRZ. The device is ideally suited for SONET/SDH/ATM applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY69753AL also includes a link fault detection circuit.