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SN65MLVD2 Series

Single channel M-LVDS type-1 receiver

Manufacturer: Texas Instruments

Catalog

Single channel M-LVDS type-1 receiver

Key Features

Low-Voltage Differential 30-Line Receivers for Signaling Rates(1)up to 250Mbps; Clock Frequencies up to 125MHzSN65MLVD2 Type-1 Receiver Incorporates 25 mV of Input Threshold HysteresisSN65MLVD3 Type-2 Receiver Provides 100 mV Offset Threshold to Detect Open-Circuit and Idle-Bus ConditionsWide Receiver Input Common-Mode Voltage Range, -1 V to 3.4 V, Allows 2 V of Ground NoiseImproved VIT(35 mV)Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint TopologyHigh Input Impedance with Low Supply VoltageBus-Pin HBM ESD Protection Exceeds 9 kVPackaged in 8-Pin SON (DRB) 70% Smaller Than 8-Pin SOICAPPLICATIONSParallel Multipoint Data and Clock Transmission via Backplanes and CablesCellular Base StationsCentral Office SwitchesNetwork Switches and Routers(1)The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).Low-Voltage Differential 30-Line Receivers for Signaling Rates(1)up to 250Mbps; Clock Frequencies up to 125MHzSN65MLVD2 Type-1 Receiver Incorporates 25 mV of Input Threshold HysteresisSN65MLVD3 Type-2 Receiver Provides 100 mV Offset Threshold to Detect Open-Circuit and Idle-Bus ConditionsWide Receiver Input Common-Mode Voltage Range, -1 V to 3.4 V, Allows 2 V of Ground NoiseImproved VIT(35 mV)Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint TopologyHigh Input Impedance with Low Supply VoltageBus-Pin HBM ESD Protection Exceeds 9 kVPackaged in 8-Pin SON (DRB) 70% Smaller Than 8-Pin SOICAPPLICATIONSParallel Multipoint Data and Clock Transmission via Backplanes and CablesCellular Base StationsCentral Office SwitchesNetwork Switches and Routers(1)The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).

Description

AI
The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE). WhenRE= low, the corresponding channel is enabled; whenRE= high, the corresponding channel is disabled. The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers (SN65MLVD2) have thresholds centered about zero with 25 mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers (SN65MLVD3) implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges. The devices are characterized for operation from -40°C to 85°C. The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE). WhenRE= low, the corresponding channel is enabled; whenRE= high, the corresponding channel is disabled. The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers (SN65MLVD2) have thresholds centered about zero with 25 mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers (SN65MLVD3) implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges. The devices are characterized for operation from -40°C to 85°C.