LTC2294 Series

Dual 12-Bit, 80Msps Low Power 3V ADC

Catalog

Dual 12-Bit, 80Msps Low Power 3V ADC

Part	Supplier Device Package	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Features	Input Type	Package / Case	Number of Bits	Data Interface	Reference Type	Configuration	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Architecture	Ratio - S/H:ADC	Number of A/D Converters	Sampling Rate (Per Second)	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Number of Inputs
Analog Devices LTC2294CUP#PBF	64-QFN (9x9)	3.4 V	2.7 V	Simultaneous Sampling	Differential Single Ended	64-WFQFN Exposed Pad	12 bits	Parallel	External Internal	S/H-ADC	70 °C	0 °C	Surface Mount	Pipelined	1:1	2	80 M	3.4 V	2.7 V	2

Catalog

Dual 12-Bit, 80Msps Low Power 3V ADC

Key Features

• Integrated Dual 12-Bit ADCs

• Sample Rate: 80Msps

• Single 3V Supply (2.7V to 3.4V)

• Low Power: 422mW

• 70.6dB SNR at 70MHz Input

• 90dB SFDR at 70MHz Input

• 110dB Channel Isolation at 100MHz

• Multiplexed or Separate Data Bus

• Flexible Input: 1VP-Pto 2VP-PRange

• 575MHz Full Power Bandwidth S/H

• Clock Duty Cycle Stabilizer

• Shutdown and Nap Modes

• Pin Compatible Family105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)

• 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)

• 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)

• 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)

• 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)

• 25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)

• 64-Pin (9mm × 9mm) QFN Package

Description

The LTC2294 is a 12-bit 80Msps, low power dual 3V A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2294 is perfect for demanding imaging and communications applications with AC performance that includes 70.6dB SNR and 90dB SFDR for signals well beyond the Nyquist frequency.DC specs include ±0.4LSB INL (typ), ±0.2LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic. An optional multiplexer allows both channels to share a digital output bus.A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.ApplicationsWireless and Wired Broadband CommunicationImaging SystemsSpectral AnalysisPortable Instrumentation