SN74AVCA164245 Series
16-Bit Dual-Supply Bus Transceive W/Configurable Voltage Translation and 3-State
Manufacturer: Texas Instruments
Catalog
16-Bit Dual-Supply Bus Transceive W/Configurable Voltage Translation and 3-State
Key Features
• Member of the Texas Instruments Widebus™ FamilyDOC™Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationDynamic Drive Capability Is Equivalent to Standard Outputs With IOHand IOLof ±24 mA at 2.5-V VCCControl Inputs VIH/VILLevels are Referenced to VCCAVoltageIf Either VCCInput Is at GND, Both Ports Are in the High-Impedance StateOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsIoffSupports Partial-Power-Down Mode OperationFully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply RangeLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)DOC and Widebus are trademarks of Texas Instruments.Member of the Texas Instruments Widebus™ FamilyDOC™Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationDynamic Drive Capability Is Equivalent to Standard Outputs With IOHand IOLof ±24 mA at 2.5-V VCCControl Inputs VIH/VILLevels are Referenced to VCCAVoltageIf Either VCCInput Is at GND, Both Ports Are in the High-Impedance StateOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsIoffSupports Partial-Power-Down Mode OperationFully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply RangeLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)DOC and Widebus are trademarks of Texas Instruments.
Description
AI
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track VCCA. VCCAaccepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB. VCCBaccepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCA164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the outputs so the buses are effectively isolated.
The SN74AVCA164245 is designed so that the control pins (1DIR, 2DIR, 1OE\, and 2OE\) are supplied by VCCA.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCAthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCCinput is at GND, then both ports are in the high-impedance state.
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track VCCA. VCCAaccepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB. VCCBaccepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCA164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the outputs so the buses are effectively isolated.
The SN74AVCA164245 is designed so that the control pins (1DIR, 2DIR, 1OE\, and 2OE\) are supplied by VCCA.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCAthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCCinput is at GND, then both ports are in the high-impedance state.