72V85 Series

8K x 9 DualAsync FIFO, 3.3V

Manufacturer: Renesas Electronics Corporation

Catalog

8K x 9 DualAsync FIFO, 3.3V

Part	Access Time	Operating Temperature (Max)	Bus Directional	Package Name	Programmable Flags Support	Data Rate	Mounting Type	FWFT Support	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Package Length	Package Width	Retransmit Capability	Current - Supply (Max)	Function	Expansion Type	Memory Width	Memory Size (Total)	Memory Additional Dimension (Variant 2)	Memory Depth
Renesas Electronics Corporation 72V85L15PA8	15 ns	70 °C	Uni-Directional	56-TFSOP 56-TSSOP	No	40 MHz	Surface Mount	No	3.6 V	3 V	0.24 in	6.1 mm	Yes	100 mA	Asynchronous	Depth Width	9 bit	144 K	2	8 K
Renesas Electronics Corporation 72V85L15PAG8	15 ns	70 °C	Uni-Directional	56-TFSOP 56-TSSOP	No	40 MHz	Surface Mount	No	3.6 V	3 V	0.24 in	6.1 mm	Yes	100 mA	Asynchronous	Depth Width	9 bit	144 K	2	8 K
Renesas Electronics Corporation 72V85L15PAG	15 ns	70 °C	Uni-Directional	56-TFSOP 56-TSSOP	No	40 MHz	Surface Mount	No	3.6 V	3 V	0.24 in	6.1 mm	Yes	100 mA	Asynchronous	Depth Width	9 bit	144 K	2	8 K
Renesas Electronics Corporation 72V85L15PA	15 ns	70 °C	Uni-Directional	56-TFSOP 56-TSSOP	No	40 MHz	Surface Mount	No	3.6 V	3 V	0.24 in	6.1 mm	Yes	100 mA	Asynchronous	Depth Width	9 bit	144 K	2	8 K
Renesas Electronics Corporation 72V85L20PA8	20 ns	70 °C	Uni-Directional	56-TFSOP 56-TSSOP	No	33.3 MHz	Surface Mount	No	3.6 V	3 V	0.24 in	6.1 mm	Yes	100 mA	Asynchronous	Depth Width	9 bit	144 K	2	8 K
Renesas Electronics Corporation 72V85L20PA	20 ns	70 °C	Uni-Directional	56-TFSOP 56-TSSOP	No	33.3 MHz	Surface Mount	No	3.6 V	3 V	0.24 in	6.1 mm	Yes	100 mA	Asynchronous	Depth Width	9 bit	144 K	2	8 K

Catalog

8K x 9 DualAsync FIFO, 3.3V

Description

The 72V85 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.