74LVCH2T45 Series

Dual Bit Voltage Translator with Bus Hold

Catalog

Dual Bit Voltage Translator with Bus Hold

Part	Package / Case	Operating Temperature [Min]	Operating Temperature [Max]	Channel Type	Voltage - VCCA [Min]	Voltage - VCCA [Max]	Supplier Device Package	Output Type	Mounting Type	Number of Circuits	Voltage - VCCB [Min]	Voltage - VCCB [Max]	Channels per Circuit	Translator Type
Diodes Inc 74LVCH2T45RA3-7	8-XFDFN	-40 °C	125 °C	Bidirectional	1.2 V	5.5 V	X2-DFN1210-8	Non-Inverted Tri-State	Surface Mount	1	1.2 V	5.5 V	2	Voltage Level

Catalog

Dual Bit Voltage Translator with Bus Hold

Key Features

• Wide Supply Voltage Range:

• VCC(A): from 1.2V to 5.5V

• VCC(B): from 1.2V to 5.5V

• ± 24mA Output Drive at 3.3V

• CMOS Low Power Consumption 16µA Maximum ICC

• High Noise Immunity

• IOFFSupports Partial-Power-Down Mode Operation

• IOFFControlled by Either VCCBeing at 0V

• Inputs Accept up to 5.5V

• Maximum data rates:

• 420Mbps (3.3V to 5V translation)

• 210Mbps (translate to 3.3V)

• 140Mbps (translate to 2.5V)

• 75Mbps (translate to 1.8V)

• 60Mbps (translate to 1.5V)

• ESD Protection Exceeds JESD 22

• 4000-V Human Body Model (A114)

• 1000 V Charged Device Model (C101)

• Latch-up Exceeds 100mA per JESD 78, Class I

• Specified from -40°C to +85°C and -40°C to +125°C

• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

• Halogen and Antimony Free. "Green" Device (Note 3)

• For automotive applications requiring specific changecontrol (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), pleasecontact usor your local Diodes representative.https://www.diodes.com/quality/product-definitions/

Description

The 74LVCH2T45 is a dual-bit, dual-supply transceiver with tri-state outputs suitable for transmitting two logic bits across different voltage domains. The direction pin (DIR) and Port A, consisting of pins 1A and 2A, have logic levels in relation to VCC(A) while port B, consisting of pins 1B and 2B have logic levels related to VCC(B). This arrangement allows for universal low-voltage translation between any voltages from 1.2V to 5.5V. When a HIGH logic level is applied to the direction pin, port A pins become inputs and port B pins are outputs. Conversely, the roles of the ports are reversed when the direction pin is asserted LOW.