
71V3558S100PFGI8
Obsolete3.3V 256K X 18 ZBT SYNCHRONOUS PIPELINED SRAM WITH 3.3V I/O

71V3558S100PFGI8
Obsolete3.3V 256K X 18 ZBT SYNCHRONOUS PIPELINED SRAM WITH 3.3V I/O
Description
General part information
71V3558 Series
The 71V3558 3.3V CMOS synchronous SRAM, organized as 256K x 18, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus, it has been given the name ZBT™, or Zero Bus Turnaround. The 71V3558 contains data I/O, address, and control signal registers.
Technical Specifications
Parameters and characteristics for this part
| Specification | 71V3558S100PFGI8 |
|---|---|
| Access Time | 5 ns |
| Clock Frequency | 100 MHz |
| Memory Depth | 256 K |
| Memory Format | SRAM |
| Memory Interface (Type) | Parallel |
| Memory Size | 4.5 Mbit |
| Memory Type | Volatile |
| Memory Width | 18 bit |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 100-LQFP |
| Package Length | 14 mm |
| Package Name | 100-TQFP |
| Package Width | 14 mm |
| Technology | SDR (ZBT), SRAM - Synchronous |
| Voltage - Supply (Maximum) | 3.465 V |
| Voltage - Supply (Minimum) | 3.135 V |
Pricing
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