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276PGILF - 16-TSSOP

276PGILF

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Renesas Electronics Corporation

TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER

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276PGILF - 16-TSSOP

276PGILF

Active
Renesas Electronics Corporation

TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER

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Technical Specifications

Parameters and characteristics for this part

Specification276PGILF
Differential - Input:OutputFalse
Frequency - Max [Max]200 MHz
InputCrystal
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputCMOS
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
PLLYes with Bypass
Ratio - Input:Output [custom]1:3
Supplier Device Package16-TSSOP
TypeClock/Frequency Synthesizer, Fanout Buffer (Distribution)
Voltage - Supply [Max]3.465 V
Voltage - Supply [Min]3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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276 Series

Triple PLL Field Programmable VCXO Clock Synthesizer

PartTypeInputVoltage - Supply [Max]Voltage - Supply [Min]Operating Temperature [Max]Operating Temperature [Min]Number of CircuitsOutputMounting TypeSupplier Device PackageFrequency - Max [Max]Ratio - Input:Output [custom]Differential - Input:OutputPLLPackage / Case [x]Package / CasePackage / Case [y]
Renesas Electronics Corporation
276PGILF
Clock/Frequency Synthesizer, Fanout Buffer (Distribution)
Crystal
3.465 V
3.135 V
85 °C
-40 °C
1
CMOS
Surface Mount
16-TSSOP
200 MHz
1:3
Yes with Bypass
0.173 in
16-TSSOP
4.4 mm

Description

General part information

276 Series

The 276 field programmable VCXO clock synthesizer generates up to three high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. It is designed to replace crystals and crystal oscillators in most electronic systems. Using IDT's VersaClockTM software to configure PLLs and outputs, the 276 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include VCXO and eight selectable configuration registers. Each of the outputs are powered by a single VDDO voltage. VDDO may vary from 1.8 V to VDD. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace VCXOs, multiple crystals and oscillators, saving board space and cost. The 276 is also available in factory programmed custom versions for high-volume applications.

Documents

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