ISC046N04NM5ATMA1
ActiveOPTIMOS™ 5 N-CHANNEL POWER MOSFET 40 V ; SUPERSO8 5X6 PACKAGE; 4.6 MOHM;
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ISC046N04NM5ATMA1
ActiveOPTIMOS™ 5 N-CHANNEL POWER MOSFET 40 V ; SUPERSO8 5X6 PACKAGE; 4.6 MOHM;
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Technical Specifications
Parameters and characteristics for this part
| Specification | ISC046N04NM5ATMA1 |
|---|---|
| Current - Continuous Drain (Id) @ 25°C | 77 A, 19 A |
| Drain to Source Voltage (Vdss) | 40 V |
| FET Type | N-Channel |
| Gate Charge (Qg) (Max) @ Vgs [Max] | 21 nC |
| Input Capacitance (Ciss) (Max) @ Vds | 1400 pF |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 175 ░C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 8-PowerTDFN |
| Power Dissipation (Max) | 50 W, 3 W |
| Rds On (Max) @ Id, Vgs | 4.6 mOhm |
| Supplier Device Package | PG-TDSON-8 FL |
| Technology | MOSFET (Metal Oxide) |
| Vgs (Max) | 20 V |
| Vgs(th) (Max) @ Id | 3.4 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 5 | $ 0.94 | |
| 10 | $ 0.78 | |||
| 50 | $ 0.72 | |||
| 100 | $ 0.52 | |||
| 200 | $ 0.49 | |||
| Digikey | Cut Tape (CT) | 1 | $ 1.47 | |
| 10 | $ 0.93 | |||
| 100 | $ 0.62 | |||
| 500 | $ 0.49 | |||
| 1000 | $ 0.44 | |||
| 2000 | $ 0.41 | |||
| Digi-Reel® | 1 | $ 1.47 | ||
| 10 | $ 0.93 | |||
| 100 | $ 0.62 | |||
| 500 | $ 0.49 | |||
| 1000 | $ 0.44 | |||
| 2000 | $ 0.41 | |||
| Tape & Reel (TR) | 5000 | $ 0.36 | ||
| Newark | Each (Supplied on Cut Tape) | 1 | $ 1.39 | |
| 10 | $ 1.02 | |||
| 25 | $ 0.93 | |||
| 50 | $ 0.84 | |||
| 100 | $ 0.74 | |||
| 250 | $ 0.68 | |||
| 500 | $ 0.62 | |||
| 1000 | $ 0.55 | |||
Description
General part information
ISC046N Series
With the OptiMOSTM5 40V normal level product family Infineon offers a benchmark solution for applications requiring normal level (higher threshold voltage) drive capability. The high Vthin the normal level portfolio offers immunity to false turn-on due to noisy environments. In addition, lower QGD/QGSratios (CGD/CGSdivider ratio) reduce the peak of the gate voltage spikes, further contributing to the robustness against unwanted turn-on.
Documents
Technical documentation and resources