LTC2153CUJ-14#PBF

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IC ADC 14BIT PIPELINED 40QFN

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LTC2153CUJ-14#PBF

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Analog Devices

IC ADC 14BIT PIPELINED 40QFN

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Technical Specifications

Parameters and characteristics for this part

Specification	LTC2153CUJ-14#PBF

Architecture	Pipelined
Configuration	S/H-ADC
Data Interface	LVDS - Parallel
Input Type	Differential
Mounting Type	Surface Mount
Number of A/D Converters	1
Number of Bits	14
Number of Inputs	1
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	40-WFQFN Exposed Pad
Ratio - S/H:ADC	1:1
Reference Type	External, Internal
Sampling Rate (Per Second)	310 M
Supplier Device Package	40-QFN (6x6)
Voltage - Supply, Analog [Max]	1.9 V
Voltage - Supply, Analog [Min]	1.74 V
Voltage - Supply, Digital [Max]	1.9 V
Voltage - Supply, Digital [Min]	1.74 V

LTC2153-14 Series

14-Bit 310Msps ADC

Part	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Reference Type	Ratio - S/H:ADC	Package / Case	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Supplier Device Package	Number of A/D Converters	Data Interface	Sampling Rate (Per Second)	Number of Bits	Number of Inputs	Architecture	Mounting Type	Input Type	Configuration
Analog Devices LTC2153IUJ-14#PBF	1.9 V	1.74 V	85 °C	-40 °C	External Internal	1:1	40-WFQFN Exposed Pad	1.9 V	1.74 V	40-QFN (6x6)	1	LVDS - Parallel	310 M	14	1	Pipelined	Surface Mount	Differential	S/H-ADC
Analog Devices LTC2153CUJ-14#PBF	1.9 V	1.74 V	70 °C	0 °C	External Internal	1:1	40-WFQFN Exposed Pad	1.9 V	1.74 V	40-QFN (6x6)	1	LVDS - Parallel	310 M	14	1	Pipelined	Surface Mount	Differential	S/H-ADC

Pricing

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Distributor	Package	Quantity	$

Description

General part information

LTC2153-14 Series

The LTC2153-14 is a 310Msps 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 68.8dB SNR and 88dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to undersample high frequencies with good performance. The latency is only five clock cycles.DC specs include ±1.2LSB INL (typ), ±0.35LSB DNL (typ) and no missing codes over temperature. The transition noise is 2.11LSBRMS.The digital outputs are double data rate (DDR) LVDS.The ENC+and ENC–inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.BitsLTC2153-1212LTC2153-1414ApplicationsCommunicationsCellular BasestationsSoftware Defined RadiosMedical ImagingHigh Definition VideoTesting and Measurement Instruments