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71V3556 - Block Diagram

71V3556SA150BGG

Obsolete
Renesas Electronics Corporation

3.3V 128KX36 ZBT SYNCHRONOUS PIPELINED SRAM WITH 3.3V I/O

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71V3556 - Block Diagram

71V3556SA150BGG

Obsolete
Renesas Electronics Corporation

3.3V 128KX36 ZBT SYNCHRONOUS PIPELINED SRAM WITH 3.3V I/O

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Description

General part information

71V3556 Series

The 71V3556 3.3V CMOS synchronous SRAM, organized as 128K x 36, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus, it has been given the name ZBT™, or Zero Bus Turnaround. The 71V3556 contains data I/O, address, and control signal registers.

Technical Specifications

Parameters and characteristics for this part

Specification71V3556SA150BGG
Access Time3.8 ns
Clock Frequency150 MHz
Memory Depth128 K
Memory FormatSRAM
Memory Interface (Type)Parallel
Memory Size4.5 Mbit
Memory TypeVolatile
Memory Width36 bit
Mounting TypeSurface Mount
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Package / Case119-BGA
Package Length14 mm
Package Name119-PBGA
Package Width22 mm
TechnologySDR (ZBT), SRAM - Synchronous
Voltage - Supply (Maximum)3.465 V
Voltage - Supply (Minimum)3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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CAD

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Documents

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