Description
General part information
CY7C1061GN30-10ZSXI
CY7C1061GN30-10ZSXI is a high-performance CMOS Static RAM organized as 1,048,576 words by 16 bits. To write to the device, take Chip Enables (active-low CE1 LOW and active-low CE2 HIGH) and Write Enable (active-low WE) input LOW. If Byte Low Enable (active-low BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte High Enable (active-low BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19). To read from the device, take Chip Enables (active-low CE1 LOW and active-low CE2 HIGH) and Output Enable (active-low OE) LOW while forcing the Write Enable (active-low WE) HIGH. If Byte Low Enable (active-low BLE) is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If Byte High Enable (active-low BHE) is LOW, then data from memory appears on I/O8 to I/O15.
Technical Specifications
Parameters and characteristics for this part
| Specification | CY7C1061GN30-10ZSXI |
|---|---|
| Access Time | 10 ns |
| Memory Depth | 1 M |
| Memory Format | SRAM |
| Memory Interface (Type) | Parallel |
| Memory Size | 16 Mb |
| Memory Type | Volatile |
| Memory Width | 16 bit |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 10.16 mm |
| Package Name | 54-TSOP II, 54-TSOP |
| Package Width | 10.16 mm |
| Technology | SRAM - Asynchronous |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 2.2 V |
| Write Cycle Time - Page | 10 ns |
| Write Cycle Time - Word | 10 ns |
Pricing
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