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TC6321T-V/9U - VDFN / 8

TC6321T-V/9U

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Microchip Technology

N/P-CHANNEL ENHANCEMENT-MODE DUAL MOSFET PAIR

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TC6321T-V/9U - VDFN / 8

TC6321T-V/9U

Active
Microchip Technology

N/P-CHANNEL ENHANCEMENT-MODE DUAL MOSFET PAIR

Technical Specifications

Parameters and characteristics for this part

SpecificationTC6321T-V/9U
ConfigurationN and P-Channel
Current - Continuous Drain (Id) @ 25°C2 A
Drain to Source Voltage (Vdss)200 V
FET FeatureLogic Level Gate
Input Capacitance (Ciss) (Max) @ Vds110 pF, 200 pF
Mounting TypeSurface Mount
Operating Temperature [Max]347 °F
Operating Temperature [Min]-55 °C
Package / Case8-VDFN Exposed Pad
Rds On (Max) @ Id, Vgs7 Ohm, 8 Ohm
Supplier Device Package8-VDFN (6x5)
TechnologyMOSFET (Metal Oxide)
Vgs(th) (Max) @ Id2 V, 2.4 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.92
Digi-Reel® 1$ 1.92
Tape & Reel (TR) 3300$ 1.45
Microchip DirectT/R 1$ 1.92
25$ 1.61
100$ 1.45
1000$ 1.35
5000$ 1.28

TC6321 Series

N/P-Channel Enhancement-Mode Dual MOSFET Pair

PartDrain to Source Voltage (Vdss)FET FeatureOperating Temperature [Min]Operating Temperature [Max]Vgs(th) (Max) @ IdMounting TypeSupplier Device PackageInput Capacitance (Ciss) (Max) @ VdsConfigurationPackage / CaseCurrent - Continuous Drain (Id) @ 25°CRds On (Max) @ Id, VgsTechnology
Microchip Technology
TC6321T-V/9U
200 V
Logic Level Gate
-55 °C
347 °F
2 V, 2.4 V
Surface Mount
8-VDFN (6x5)
110 pF, 200 pF
N and P-Channel
8-VDFN Exposed Pad
2 A
7 Ohm, 8 Ohm
MOSFET (Metal Oxide)

Description

General part information

TC6321 Series

TC6321 is derived from the TC6320, with its high voltage, low threshold N-channel and P-channel MOSFETs, but offered in a thermally enhanced 5mm x 6mm DFN, with better thermal transfer and higher operating range, to 175°C. Both MOSFETs have integrated GATE-to-SOURCE resistors and GATE-to-SOURCE Zener diode clamps which are desired for high voltage pulser applications. It is a complementary, high-speed, high voltage, GATE-clamped N- and P-channel MOSFET pair, which utilizes an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.