
TC6321T-V/9U
ActiveN/P-CHANNEL ENHANCEMENT-MODE DUAL MOSFET PAIR
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TC6321T-V/9U
ActiveN/P-CHANNEL ENHANCEMENT-MODE DUAL MOSFET PAIR
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Technical Specifications
Parameters and characteristics for this part
Specification | TC6321T-V/9U |
---|---|
Configuration | N and P-Channel |
Current - Continuous Drain (Id) @ 25°C | 2 A |
Drain to Source Voltage (Vdss) | 200 V |
FET Feature | Logic Level Gate |
Input Capacitance (Ciss) (Max) @ Vds | 110 pF, 200 pF |
Mounting Type | Surface Mount |
Operating Temperature [Max] | 347 °F |
Operating Temperature [Min] | -55 °C |
Package / Case | 8-VDFN Exposed Pad |
Rds On (Max) @ Id, Vgs | 7 Ohm, 8 Ohm |
Supplier Device Package | 8-VDFN (6x5) |
Technology | MOSFET (Metal Oxide) |
Vgs(th) (Max) @ Id | 2 V, 2.4 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Digikey | Cut Tape (CT) | 1 | $ 1.92 | |
Digi-Reel® | 1 | $ 1.92 | ||
Tape & Reel (TR) | 3300 | $ 1.45 | ||
Microchip Direct | T/R | 1 | $ 1.92 | |
25 | $ 1.61 | |||
100 | $ 1.45 | |||
1000 | $ 1.35 | |||
5000 | $ 1.28 |
TC6321 Series
N/P-Channel Enhancement-Mode Dual MOSFET Pair
Part | Drain to Source Voltage (Vdss) | FET Feature | Operating Temperature [Min] | Operating Temperature [Max] | Vgs(th) (Max) @ Id | Mounting Type | Supplier Device Package | Input Capacitance (Ciss) (Max) @ Vds | Configuration | Package / Case | Current - Continuous Drain (Id) @ 25°C | Rds On (Max) @ Id, Vgs | Technology |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Microchip Technology TC6321T-V/9U | 200 V | Logic Level Gate | -55 °C | 347 °F | 2 V, 2.4 V | Surface Mount | 8-VDFN (6x5) | 110 pF, 200 pF | N and P-Channel | 8-VDFN Exposed Pad | 2 A | 7 Ohm, 8 Ohm | MOSFET (Metal Oxide) |
Description
General part information
TC6321 Series
TC6321 is derived from the TC6320, with its high voltage, low threshold N-channel and P-channel MOSFETs, but offered in a thermally enhanced 5mm x 6mm DFN, with better thermal transfer and higher operating range, to 175°C. Both MOSFETs have integrated GATE-to-SOURCE resistors and GATE-to-SOURCE Zener diode clamps which are desired for high voltage pulser applications. It is a complementary, high-speed, high voltage, GATE-clamped N- and P-channel MOSFET pair, which utilizes an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Documents
Technical documentation and resources