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STM32L412RBI6P - STM32G081RBI6

STM32L412RBI6P

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STMicroelectronics

IC MCU 32BIT 128KB FLASH 64UFBGA

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STM32L412RBI6P - STM32G081RBI6

STM32L412RBI6P

Active
STMicroelectronics

IC MCU 32BIT 128KB FLASH 64UFBGA

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationSTM32L412RBI6P
ConnectivityQuad SPI, USB, LINbus, I2C, Infrared, IrDA, SPI, UART/USART
Core ProcessorARM® Cortex®-M4
Core Size32-Bit Single-Core
Data Converters [custom]16
Data Converters [custom]12 b
Mounting TypeSurface Mount
Number of I/O52
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Oscillator TypeInternal
Package / Case64-UFBGA
PeripheralsPWM, WDT, Brown-out Detect/Reset, DMA, External SMPS Required
Program Memory Size128 KB
Program Memory TypeFLASH
RAM Size40 K
Speed80 MHz
Supplier Device Package64-UFBGA (5x5)
Voltage - Supply (Vcc/Vdd) [Max]3.6 V
Voltage - Supply (Vcc/Vdd) [Min]1.71 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 2940$ 2.40

Description

General part information

NUCLEO-L412RB-P Series

The STM32L412xx devices are ultra-low-power microcontrollers based on the high-performance Arm®Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision that supports all Arm®single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.

The STM32L412xx devices embed high-speed memories (flash memory up to 128 Kbyte, 40 Kbyte of SRAM), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.

The STM32L412xx devices embed several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall.

Documents

Technical documentation and resources