Description
General part information
S80KS2564GACHV040
S80KS2564GACHV040 is a 256Mb HYPERRAM™ self-refresh DRAM (PSRAM). The DRAM array uses dynamic cells that require periodic refresh. Refresh control logic within the device manages the refresh operations on the DRAM array when the memory is not being actively read or written by the HYPERBUS™ extended-IO host. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as though the memory uses static cells that retain data without refresh. Hence, the memory is more accurately described as pseudo static RAM (PSRAM). Since the DRAM cells cannot be refreshed during a read or write transaction, there is a requirement that the host limit read or write burst transfers lengths to allow internal logic refresh operations when they are needed.
Technical Specifications
Parameters and characteristics for this part
| Specification | S80KS2564GACHV040 |
|---|---|
| Access Time | 35 ns |
| Clock Frequency | 200 MHz |
| Memory Depth | 16 M |
| Memory Format | PSRAM |
| Memory Interface (Type) | HyperBus |
| Memory Size | 256 Mbit |
| Memory Type | Volatile |
| Memory Width | 16 bit |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 105 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 49-VBGA |
| Package Length | 8 mm |
| Package Name | 49-FBGA |
| Package Width | 8 mm |
| Technology | PSRAM (Pseudo SRAM) |
| Voltage - Supply (Maximum) | 2 V |
| Voltage - Supply (Minimum) | 1.7 V |
| Write Cycle Time - Page | 35 ns |
| Write Cycle Time - Word | 35 ns |
Pricing
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